[Lldb-commits] [PATCH] D13241: [LLDB][MIPS] Fix hit_count for mips watchpoints

[Mohit Bhakkad via lldb-commits]

mohit.bhakkad added a comment.

Jason, in MIPS watch registers, last 3 bits of watchpoint addresses are masked by IRW(instruction, read, write types) flags, 
so machine gives exception for any address having other bits same to the actual watch address execept last 3 bits.
Comment at line number 749 in below code gives an such example.

Zachary, TestMyFirstWatchpoint.py already covers this case.


Repository:
  rL LLVM

http://reviews.llvm.org/D13241