[Lldb-commits] [lldb] r205770 - Added i686 architecture (ArchSpec::Core::eCore_x86_32_i686).

[Virgile Bello]

Author: xen2
Date: Tue Apr  8 09:48:48 2014
New Revision: 205770

URL: http://llvm.org/viewvc/llvm-project?rev=205770&view=rev
Log:
Added i686 architecture (ArchSpec::Core::eCore_x86_32_i686).

Modified:
    lldb/trunk/include/lldb/Core/ArchSpec.h
    lldb/trunk/source/Core/ArchSpec.cpp

Modified: lldb/trunk/include/lldb/Core/ArchSpec.h
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/include/lldb/Core/ArchSpec.h?rev=205770&r1=205769&r2=205770&view=diff
==============================================================================
--- lldb/trunk/include/lldb/Core/ArchSpec.h (original)
+++ lldb/trunk/include/lldb/Core/ArchSpec.h Tue Apr  8 09:48:48 2014
@@ -91,6 +91,7 @@ public:
         eCore_x86_32_i386,
         eCore_x86_32_i486,
         eCore_x86_32_i486sx,
+        eCore_x86_32_i686,
         
         eCore_x86_64_x86_64,
         eCore_x86_64_x86_64h, // Haswell enabled x86_64
@@ -124,7 +125,7 @@ public:
         kCore_ppc64_last    = eCore_ppc64_ppc970_64,
 
         kCore_x86_32_first  = eCore_x86_32_i386,
-        kCore_x86_32_last   = eCore_x86_32_i486sx,
+        kCore_x86_32_last   = eCore_x86_32_i686,
 
         kCore_hexagon_first  = eCore_hexagon_generic,
         kCore_hexagon_last   = eCore_hexagon_hexagonv5

Modified: lldb/trunk/source/Core/ArchSpec.cpp
URL: http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Core/ArchSpec.cpp?rev=205770&r1=205769&r2=205770&view=diff
==============================================================================
--- lldb/trunk/source/Core/ArchSpec.cpp (original)
+++ lldb/trunk/source/Core/ArchSpec.cpp Tue Apr  8 09:48:48 2014
@@ -103,6 +103,7 @@ static const CoreDefinition g_core_defin
     { eByteOrderLittle, 4, 1, 15, llvm::Triple::x86    , ArchSpec::eCore_x86_32_i386    , "i386"      },
     { eByteOrderLittle, 4, 1, 15, llvm::Triple::x86    , ArchSpec::eCore_x86_32_i486    , "i486"      },
     { eByteOrderLittle, 4, 1, 15, llvm::Triple::x86    , ArchSpec::eCore_x86_32_i486sx  , "i486sx"    },
+    { eByteOrderLittle, 4, 1, 15, llvm::Triple::x86    , ArchSpec::eCore_x86_32_i686    , "i686"      },
 
     { eByteOrderLittle, 8, 1, 15, llvm::Triple::x86_64 , ArchSpec::eCore_x86_64_x86_64  , "x86_64"    },
     { eByteOrderLittle, 8, 1, 15, llvm::Triple::x86_64 , ArchSpec::eCore_x86_64_x86_64h , "x86_64h"   },