<html><head><meta http-equiv="Content-Type" content="text/html charset=iso-8859-1"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;"><br><div><div>On Aug 15, 2014, at 7:52 AM, Tom Stellard <<a href="mailto:tom@stellard.net">tom@stellard.net</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div style="font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;">On Fri, Aug 15, 2014 at 07:45:30AM -0700, Tom Stellard wrote:<br><blockquote type="cite">On Fri, Aug 15, 2014 at 07:11:57AM -0700, Tom Stellard wrote:<br><blockquote type="cite">On Fri, Aug 15, 2014 at 07:52:21AM -0500, Aaron Watry wrote:<br><blockquote type="cite">Does anyone else have feedback on this?<br><br></blockquote><br>Hi Aaron,<br><br>I've been testing this the last few days and trying to fix some vload and<br>vstore bugs on SI. At this point I think the remaining bugs are in<br>the LLVM backend, so you can go ahead and commit this patch.<br><br></blockquote><br>Maybe I spoke too soon, the code generated for vstore3 looks wrong:<br><br>; Function Attrs: alwaysinline nounwind<br>define void @_Z7vstore3Dv3_ijPU3AS3i(<3 x i32> %vec, i32 %offset, i32 addrspace(3)* nocapture %mem) #0 {<br>entry:<br> %mul = mul i32 %offset, 3<br> %arrayidx = getelementptr inbounds i32 addrspace(3)* %mem, i32 %mul<br> %extractVec2 = shufflevector <3 x i32> %vec, <3 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef><br> %storetmp3 = bitcast i32 addrspace(3)* %arrayidx to <4 x i32> addrspace(3)*<br> store <4 x i32> %extractVec2, <4 x i32> addrspace(3)* %storetmp3, align 4, !tbaa !1<br> ret void<br>}<br><br>It's storing a vec4 value with the last element undef. This would be legal<br>if mem were declared as <3 x i32>*, since in OpenCL vec3 occupy the same<br>amount of memory as vec4. However, in this case, since mem is declared<br>as i32*, I think we should only be storing three values.<br><br>I'm not sure yet if this is a bug in libclc or LLVM, but I'm looking into it.<br><br></blockquote><br>I got it to work with this implementation of vstore3:<br><br><br>typedef PRIM_TYPE##3 less_aligned_##ADDR_SPACE##PRIM_TYPE##3 __attribute__ ((aligned (sizeof(PRIM_TYPE))));\<br>_CLC_OVERLOAD _CLC_DEF void vstore3(PRIM_TYPE##3 vec, size_t offset, ADDR_SPACE PRIM_TYPE *mem) { \<br> *((ADDR_SPACE less_aligned_##ADDR_SPACE##PRIM_TYPE##2*) (&mem[3*offset])) = (PRIM_TYPE##2)(vec.s0, vec.s1); \<br> mem[3 * offset + 2] = vec.s2;\<br>} \<br>\<br><br>Which generates the following LLVM IR:<br><br>; Function Attrs: alwaysinline nounwind<br>define void @_Z7vstore3Dv3_ijPU3AS1i(<3 x i32> %vec, i32 %offset, i32 addrspace(1)* nocapture %mem) #0 {<br>entry:<br> %vecinit1 = shufflevector <3 x i32> %vec, <3 x i32> undef, <2 x i32> <i32 0, i32 1><br> %mul = mul i32 %offset, 3<br> %0 = sext i32 %mul to i64<br> %arrayidx = getelementptr inbounds i32 addrspace(1)* %mem, i64 %0<br> %1 = bitcast i32 addrspace(1)* %arrayidx to <2 x i32> addrspace(1)*<br> store <2 x i32> %vecinit1, <2 x i32> addrspace(1)* %1, align 4, !tbaa !2<br> %2 = extractelement <3 x i32> %vec, i32 2<br> %add = add i32 %mul, 2<br> %3 = sext i32 %add to i64<br> %arrayidx3 = getelementptr inbounds i32 addrspace(1)* %mem, i64 %3<br> store i32 %2, i32 addrspace(1)* %arrayidx3, align 4, !tbaa !7<br> ret void<br>}<br><br>Does this look correct?<br><br>-Tom<br></div></blockquote></div><br><div>It looks correct, but it really should be a single store with the align 4. Does the attribute aligned thing not emit the right thing from clang?</div></body></html>