[flang-commits] [flang] [flang][cuda] Lower simple host to device data transfer (PR #85960)
Valentin Clement バレンタイン クレメン via flang-commits
flang-commits at lists.llvm.org
Thu Mar 21 14:14:05 PDT 2024
https://github.com/clementval updated https://github.com/llvm/llvm-project/pull/85960
>From 27652dc0d6413af847bb92f136f41a80e4e90ece Mon Sep 17 00:00:00 2001
From: Valentin Clement <clementval at gmail.com>
Date: Tue, 19 Mar 2024 14:13:37 -0700
Subject: [PATCH 1/2] [flang][cuda] Lower host to device data transfer
---
.../flang/Optimizer/Dialect/FIRAttr.td | 16 +++++
.../include/flang/Optimizer/Dialect/FIROps.td | 25 ++++++++
flang/lib/Lower/Bridge.cpp | 41 ++++++++++--
flang/lib/Optimizer/Dialect/FIRAttr.cpp | 3 +-
flang/test/Lower/CUDA/cuda-data-transfer.cuf | 64 +++++++++++++++++++
5 files changed, 142 insertions(+), 7 deletions(-)
create mode 100644 flang/test/Lower/CUDA/cuda-data-transfer.cuf
diff --git a/flang/include/flang/Optimizer/Dialect/FIRAttr.td b/flang/include/flang/Optimizer/Dialect/FIRAttr.td
index 2ac4af9e66aa80..f8b3fb861cc62f 100644
--- a/flang/include/flang/Optimizer/Dialect/FIRAttr.td
+++ b/flang/include/flang/Optimizer/Dialect/FIRAttr.td
@@ -137,4 +137,20 @@ def fir_CUDAClusterDimsAttr : fir_Attr<"CUDAClusterDims"> {
let assemblyFormat = "`<` struct(params) `>`";
}
+def fir_CUDADataTransferKind : I32EnumAttr<
+ "CUDADataTransferKind", "CUDA Fortran data transfer kind",
+ [
+ I32EnumAttrCase<"DeviceHost", 0, "device_host">,
+ I32EnumAttrCase<"HostDevice", 1, "host_device">,
+ I32EnumAttrCase<"DeviceDevice", 2, "device_device">,
+ ]> {
+ let genSpecializedAttr = 0;
+ let cppNamespace = "::fir";
+}
+
+def fir_CUDADataTransferKindAttr :
+ EnumAttr<FIROpsDialect, fir_CUDADataTransferKind, "cuda_transfer"> {
+ let assemblyFormat = [{ ```<` $value `>` }];
+}
+
#endif // FIR_DIALECT_FIR_ATTRS
diff --git a/flang/include/flang/Optimizer/Dialect/FIROps.td b/flang/include/flang/Optimizer/Dialect/FIROps.td
index 6e520d111701f0..3a1af1258aff28 100644
--- a/flang/include/flang/Optimizer/Dialect/FIROps.td
+++ b/flang/include/flang/Optimizer/Dialect/FIROps.td
@@ -3165,4 +3165,29 @@ def fir_CUDAKernelOp : fir_Op<"cuda_kernel", [AttrSizedOperandSegments,
let hasVerifier = 1;
}
+def fir_CUDADataTransferOp : fir_Op<"cuda_data_transfer", []> {
+ let summary = "Represent a data transfer between host and device memory";
+
+ let description = [{
+ CUDA Fortran allows data transfer to be done via intrinsic assignment
+ between a host and a device variable. This operation is used to materialized
+ the data transfer between the lhs and rhs memory references.
+ The kind of transfer is specified in the attribute.
+
+ ```
+ adev = a ! transfer host to device
+ a = adev ! transfer device to host
+ bdev = adev ! transfer device to device
+ ```
+ }];
+
+ let arguments = (ins Arg<AnyReferenceLike, "", [MemWrite]>:$src,
+ Arg<AnyReferenceLike, "", [MemRead]>:$dst,
+ fir_CUDADataTransferKindAttr:$transfer_kind);
+
+ let assemblyFormat = [{
+ $src `to` $dst attr-dict `:` type(operands)
+ }];
+}
+
#endif
diff --git a/flang/lib/Lower/Bridge.cpp b/flang/lib/Lower/Bridge.cpp
index c3cb9ba6a47e3d..1f923ba953843e 100644
--- a/flang/lib/Lower/Bridge.cpp
+++ b/flang/lib/Lower/Bridge.cpp
@@ -3706,15 +3706,40 @@ class FirConverter : public Fortran::lower::AbstractConverter {
return false;
}
+ static void genCUDADataTransfer(fir::FirOpBuilder &builder,
+ mlir::Location loc, bool lhsIsDevice,
+ hlfir::Entity &lhs, bool rhsIsDevice,
+ hlfir::Entity &rhs) {
+ if (rhs.isBoxAddressOrValue() || lhs.isBoxAddressOrValue())
+ TODO(loc, "CUDA data transfler with descriptors");
+ if (lhsIsDevice && !rhsIsDevice) {
+ auto transferKindAttr = fir::CUDADataTransferKindAttr::get(
+ builder.getContext(), fir::CUDADataTransferKind::HostDevice);
+ // device = host
+ if (!rhs.isVariable()) {
+ auto [temp, cleanup] = hlfir::createTempFromMold(loc, builder, rhs);
+ builder.create<hlfir::AssignOp>(loc, rhs, temp, false, false);
+ builder.create<fir::CUDADataTransferOp>(loc, temp, lhs,
+ transferKindAttr);
+ if (mlir::isa<fir::HeapType>(temp.getType()))
+ builder.create<fir::FreeMemOp>(loc, temp);
+ } else {
+ builder.create<fir::CUDADataTransferOp>(loc, rhs, lhs,
+ transferKindAttr);
+ }
+ return;
+ }
+ TODO(loc, "Assignement with CUDA Fortran variables");
+ }
+
void genDataAssignment(
const Fortran::evaluate::Assignment &assign,
const Fortran::evaluate::ProcedureRef *userDefinedAssignment) {
mlir::Location loc = getCurrentLocation();
fir::FirOpBuilder &builder = getFirOpBuilder();
- if (Fortran::evaluate::HasCUDAAttrs(assign.lhs) ||
- Fortran::evaluate::HasCUDAAttrs(assign.rhs))
- TODO(loc, "Assignement with CUDA Fortran variables");
+ bool lhsIsDevice = Fortran::evaluate::HasCUDAAttrs(assign.lhs);
+ bool rhsIsDevice = Fortran::evaluate::HasCUDAAttrs(assign.rhs);
// Gather some information about the assignment that will impact how it is
// lowered.
@@ -3772,9 +3797,13 @@ class FirConverter : public Fortran::lower::AbstractConverter {
Fortran::lower::StatementContext localStmtCtx;
hlfir::Entity rhs = evaluateRhs(localStmtCtx);
hlfir::Entity lhs = evaluateLhs(localStmtCtx);
- builder.create<hlfir::AssignOp>(loc, rhs, lhs,
- isWholeAllocatableAssignment,
- keepLhsLengthInAllocatableAssignment);
+ if (lhsIsDevice || rhsIsDevice) {
+ genCUDADataTransfer(builder, loc, lhsIsDevice, lhs, rhsIsDevice, rhs);
+ } else {
+ builder.create<hlfir::AssignOp>(loc, rhs, lhs,
+ isWholeAllocatableAssignment,
+ keepLhsLengthInAllocatableAssignment);
+ }
return;
}
// Assignments inside Forall, Where, or assignments to a vector subscripted
diff --git a/flang/lib/Optimizer/Dialect/FIRAttr.cpp b/flang/lib/Optimizer/Dialect/FIRAttr.cpp
index 0cf8dfb9f784c3..e43710f5627ee0 100644
--- a/flang/lib/Optimizer/Dialect/FIRAttr.cpp
+++ b/flang/lib/Optimizer/Dialect/FIRAttr.cpp
@@ -299,5 +299,6 @@ void FIROpsDialect::registerAttributes() {
addAttributes<ClosedIntervalAttr, ExactTypeAttr, FortranVariableFlagsAttr,
LowerBoundAttr, PointIntervalAttr, RealAttr, SubclassAttr,
UpperBoundAttr, CUDADataAttributeAttr, CUDAProcAttributeAttr,
- CUDALaunchBoundsAttr, CUDAClusterDimsAttr>();
+ CUDALaunchBoundsAttr, CUDAClusterDimsAttr,
+ CUDADataTransferKindAttr>();
}
diff --git a/flang/test/Lower/CUDA/cuda-data-transfer.cuf b/flang/test/Lower/CUDA/cuda-data-transfer.cuf
new file mode 100644
index 00000000000000..8ae42cbddce862
--- /dev/null
+++ b/flang/test/Lower/CUDA/cuda-data-transfer.cuf
@@ -0,0 +1,64 @@
+! RUN: bbc -emit-hlfir -fcuda %s -o - | FileCheck %s
+
+! Test CUDA Fortran data transfer using assignment statements.
+
+subroutine sub1()
+ integer, device :: m
+ integer, device :: adev(10)
+ integer :: i, ahost(10), bhost(10)
+
+ m = 1 + i
+
+ m = 1
+
+ adev = ahost
+
+ adev = ahost + 1
+
+ adev(1:5) = ahost(1:5)
+
+ adev = ahost + bhost
+
+end
+
+! CHECK-LABEL: func.func @_QPsub1()
+! CHECK: %[[TMP1_ALLOC:.*]] = fir.alloca i32 {bindc_name = ".tmp"}
+! CHECK: %[[TMP0_ALLOC:.*]] = fir.alloca i32 {bindc_name = ".tmp"}
+
+! CHECK: %[[ADEV:.*]]:2 = hlfir.declare %{{.*}}(%{{.*}}) {cuda_attr = #fir.cuda<device>, uniq_name = "_QFsub1Eadev"} : (!fir.ref<!fir.array<10xi32>>, !fir.shape<1>) -> (!fir.ref<!fir.array<10xi32>>, !fir.ref<!fir.array<10xi32>>)
+! CHECK: %[[AHOST:.*]]:2 = hlfir.declare %{{.*}}(%{{.*}}) {uniq_name = "_QFsub1Eahost"} : (!fir.ref<!fir.array<10xi32>>, !fir.shape<1>) -> (!fir.ref<!fir.array<10xi32>>, !fir.ref<!fir.array<10xi32>>)
+! CHECK: %[[I:.*]]:2 = hlfir.declare %{{.*}} {uniq_name = "_QFsub1Ei"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
+! CHECK: %[[M:.*]]:2 = hlfir.declare %{{.*}} {cuda_attr = #fir.cuda<device>, uniq_name = "_QFsub1Em"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
+
+! CHECK: %[[C1:.*]] = arith.constant 1 : i32
+! CHECK: %[[LOADED_I:.*]] = fir.load %[[I]]#0 : !fir.ref<i32>
+! CHECK: %[[ADD:.*]] = arith.addi %[[C1]], %[[LOADED_I]] : i32
+! CHECK: %[[TMP0:.*]]:2 = hlfir.declare %[[TMP0_ALLOC:.*]] {uniq_name = ".tmp"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
+! CHECK: hlfir.assign %[[ADD]] to %[[TMP0]]#0 : i32, !fir.ref<i32>
+! CHECK: fir.cuda_data_transfer %[[TMP0]]#0 to %[[M]]#0 {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.ref<i32>, !fir.ref<i32>
+
+! CHECK: %[[C1:.*]] = arith.constant 1 : i32
+! CHECK: %[[TMP1:.*]]:2 = hlfir.declare %[[TMP1_ALLOC]] {uniq_name = ".tmp"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
+! CHECK: hlfir.assign %[[C1]] to %[[TMP1]]#0 : i32, !fir.ref<i32>
+! CHECK: fir.cuda_data_transfer %[[TMP1]]#0 to %[[M]]#0 {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.ref<i32>, !fir.ref<i32>
+
+! CHECK: fir.cuda_data_transfer %[[AHOST]]#0 to %[[ADEV]]#0 {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.ref<!fir.array<10xi32>>, !fir.ref<!fir.array<10xi32>>
+
+! CHECK: %[[ELEMENTAL:.*]] = hlfir.elemental %{{.*}} unordered : (!fir.shape<1>) -> !hlfir.expr<10xi32> {
+
+! CHECK: %[[ALLOCMEM:.*]] = fir.allocmem !fir.array<10xi32> {bindc_name = ".tmp", uniq_name = ""}
+! CHECK: %[[TEMP:.*]]:2 = hlfir.declare %[[ALLOCMEM]](%{{.*}}) {uniq_name = ".tmp"} : (!fir.heap<!fir.array<10xi32>>, !fir.shape<1>) -> (!fir.heap<!fir.array<10xi32>>, !fir.heap<!fir.array<10xi32>>)
+! CHECK: hlfir.assign %[[ELEMENTAL]] to %[[TEMP]]#0 : !hlfir.expr<10xi32>, !fir.heap<!fir.array<10xi32>>
+! CHECK: fir.cuda_data_transfer %[[TEMP]]#0 to %[[ADEV]]#0 {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.heap<!fir.array<10xi32>>, !fir.ref<!fir.array<10xi32>>
+! CHECK: fir.freemem %[[TEMP]]#0 : !fir.heap<!fir.array<10xi32>>
+
+! CHECK: %[[DES_AHOST:.*]] = hlfir.designate %[[AHOST]]#0 (%c1{{.*}}:%c5{{.*}}:%c1{{.*}}) shape %{{.*}} : (!fir.ref<!fir.array<10xi32>>, index, index, index, !fir.shape<1>) -> !fir.ref<!fir.array<5xi32>>
+! CHECK: %[[DES_ADEV:.*]] = hlfir.designate %[[ADEV]]#0 (%c1{{.*}}:%c5{{.*}}:%c1{{.*}}) shape %{{.*}} : (!fir.ref<!fir.array<10xi32>>, index, index, index, !fir.shape<1>) -> !fir.ref<!fir.array<5xi32>>
+! CHECK: fir.cuda_data_transfer %[[DES_AHOST]] to %[[DES_ADEV]] {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.ref<!fir.array<5xi32>>, !fir.ref<!fir.array<5xi32>>
+
+! CHECK: %[[ELEMENTAL:.*]] = hlfir.elemental %{{.*}} unordered : (!fir.shape<1>) -> !hlfir.expr<10xi32> {
+! CHECK: %[[ALLOCMEM:.*]] = fir.allocmem !fir.array<10xi32> {bindc_name = ".tmp", uniq_name = ""}
+! CHECK: %[[TEMP:.*]]:2 = hlfir.declare %[[ALLOCMEM]](%{{.*}}) {uniq_name = ".tmp"} : (!fir.heap<!fir.array<10xi32>>, !fir.shape<1>) -> (!fir.heap<!fir.array<10xi32>>, !fir.heap<!fir.array<10xi32>>)
+! CHECK: hlfir.assign %[[ELEMENTAL]] to %[[TEMP]]#0 : !hlfir.expr<10xi32>, !fir.heap<!fir.array<10xi32>>
+! CHECK: fir.cuda_data_transfer %[[TEMP]]#0 to %[[ADEV]]#0 {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.heap<!fir.array<10xi32>>, !fir.ref<!fir.array<10xi32>>
+! CHECK: fir.freemem %[[TEMP]]#0 : !fir.heap<!fir.array<10xi32>>
>From ad900d4a1e1ee6ecd259ff4a32338bca05a12ea3 Mon Sep 17 00:00:00 2001
From: Valentin Clement <clementval at gmail.com>
Date: Thu, 21 Mar 2024 14:13:42 -0700
Subject: [PATCH 2/2] Use hlfir.associate instead of hlfir.assign for temp host
rhs
---
flang/lib/Lower/Bridge.cpp | 9 +++---
flang/test/Lower/CUDA/cuda-data-transfer.cuf | 33 ++++++++------------
2 files changed, 17 insertions(+), 25 deletions(-)
diff --git a/flang/lib/Lower/Bridge.cpp b/flang/lib/Lower/Bridge.cpp
index 1f923ba953843e..9cd1dac8b4fee6 100644
--- a/flang/lib/Lower/Bridge.cpp
+++ b/flang/lib/Lower/Bridge.cpp
@@ -3717,12 +3717,11 @@ class FirConverter : public Fortran::lower::AbstractConverter {
builder.getContext(), fir::CUDADataTransferKind::HostDevice);
// device = host
if (!rhs.isVariable()) {
- auto [temp, cleanup] = hlfir::createTempFromMold(loc, builder, rhs);
- builder.create<hlfir::AssignOp>(loc, rhs, temp, false, false);
- builder.create<fir::CUDADataTransferOp>(loc, temp, lhs,
+ auto associate = hlfir::genAssociateExpr(
+ loc, builder, rhs, rhs.getType(), ".cuf_host_tmp");
+ builder.create<fir::CUDADataTransferOp>(loc, associate.getBase(), lhs,
transferKindAttr);
- if (mlir::isa<fir::HeapType>(temp.getType()))
- builder.create<fir::FreeMemOp>(loc, temp);
+ builder.create<hlfir::EndAssociateOp>(loc, associate);
} else {
builder.create<fir::CUDADataTransferOp>(loc, rhs, lhs,
transferKindAttr);
diff --git a/flang/test/Lower/CUDA/cuda-data-transfer.cuf b/flang/test/Lower/CUDA/cuda-data-transfer.cuf
index 8ae42cbddce862..54226b8623e6a9 100644
--- a/flang/test/Lower/CUDA/cuda-data-transfer.cuf
+++ b/flang/test/Lower/CUDA/cuda-data-transfer.cuf
@@ -22,8 +22,6 @@ subroutine sub1()
end
! CHECK-LABEL: func.func @_QPsub1()
-! CHECK: %[[TMP1_ALLOC:.*]] = fir.alloca i32 {bindc_name = ".tmp"}
-! CHECK: %[[TMP0_ALLOC:.*]] = fir.alloca i32 {bindc_name = ".tmp"}
! CHECK: %[[ADEV:.*]]:2 = hlfir.declare %{{.*}}(%{{.*}}) {cuda_attr = #fir.cuda<device>, uniq_name = "_QFsub1Eadev"} : (!fir.ref<!fir.array<10xi32>>, !fir.shape<1>) -> (!fir.ref<!fir.array<10xi32>>, !fir.ref<!fir.array<10xi32>>)
! CHECK: %[[AHOST:.*]]:2 = hlfir.declare %{{.*}}(%{{.*}}) {uniq_name = "_QFsub1Eahost"} : (!fir.ref<!fir.array<10xi32>>, !fir.shape<1>) -> (!fir.ref<!fir.array<10xi32>>, !fir.ref<!fir.array<10xi32>>)
@@ -33,32 +31,27 @@ end
! CHECK: %[[C1:.*]] = arith.constant 1 : i32
! CHECK: %[[LOADED_I:.*]] = fir.load %[[I]]#0 : !fir.ref<i32>
! CHECK: %[[ADD:.*]] = arith.addi %[[C1]], %[[LOADED_I]] : i32
-! CHECK: %[[TMP0:.*]]:2 = hlfir.declare %[[TMP0_ALLOC:.*]] {uniq_name = ".tmp"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
-! CHECK: hlfir.assign %[[ADD]] to %[[TMP0]]#0 : i32, !fir.ref<i32>
-! CHECK: fir.cuda_data_transfer %[[TMP0]]#0 to %[[M]]#0 {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.ref<i32>, !fir.ref<i32>
+! CHECK: %[[ASSOC:.*]]:3 = hlfir.associate %[[ADD]] {uniq_name = ".cuf_host_tmp"} : (i32) -> (!fir.ref<i32>, !fir.ref<i32>, i1)
+! CHECK: fir.cuda_data_transfer %[[ASSOC]]#0 to %[[M]]#0 {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.ref<i32>, !fir.ref<i32>
+! CHECK: hlfir.end_associate %[[ASSOC]]#1, %[[ASSOC]]#2 : !fir.ref<i32>, i1
! CHECK: %[[C1:.*]] = arith.constant 1 : i32
-! CHECK: %[[TMP1:.*]]:2 = hlfir.declare %[[TMP1_ALLOC]] {uniq_name = ".tmp"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>)
-! CHECK: hlfir.assign %[[C1]] to %[[TMP1]]#0 : i32, !fir.ref<i32>
-! CHECK: fir.cuda_data_transfer %[[TMP1]]#0 to %[[M]]#0 {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.ref<i32>, !fir.ref<i32>
+! CHECK: %[[ASSOC:.*]]:3 = hlfir.associate %[[C1]] {uniq_name = ".cuf_host_tmp"} : (i32) -> (!fir.ref<i32>, !fir.ref<i32>, i1)
+! CHECK: fir.cuda_data_transfer %[[ASSOC]]#0 to %[[M]]#0 {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.ref<i32>, !fir.ref<i32>
+! CHECK: hlfir.end_associate %[[ASSOC]]#1, %[[ASSOC]]#2 : !fir.ref<i32>, i1
! CHECK: fir.cuda_data_transfer %[[AHOST]]#0 to %[[ADEV]]#0 {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.ref<!fir.array<10xi32>>, !fir.ref<!fir.array<10xi32>>
! CHECK: %[[ELEMENTAL:.*]] = hlfir.elemental %{{.*}} unordered : (!fir.shape<1>) -> !hlfir.expr<10xi32> {
-
-! CHECK: %[[ALLOCMEM:.*]] = fir.allocmem !fir.array<10xi32> {bindc_name = ".tmp", uniq_name = ""}
-! CHECK: %[[TEMP:.*]]:2 = hlfir.declare %[[ALLOCMEM]](%{{.*}}) {uniq_name = ".tmp"} : (!fir.heap<!fir.array<10xi32>>, !fir.shape<1>) -> (!fir.heap<!fir.array<10xi32>>, !fir.heap<!fir.array<10xi32>>)
-! CHECK: hlfir.assign %[[ELEMENTAL]] to %[[TEMP]]#0 : !hlfir.expr<10xi32>, !fir.heap<!fir.array<10xi32>>
-! CHECK: fir.cuda_data_transfer %[[TEMP]]#0 to %[[ADEV]]#0 {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.heap<!fir.array<10xi32>>, !fir.ref<!fir.array<10xi32>>
-! CHECK: fir.freemem %[[TEMP]]#0 : !fir.heap<!fir.array<10xi32>>
+! CHECK: %[[ASSOC:.*]]:3 = hlfir.associate %[[ELEMENTAL]](%{{.*}}) {uniq_name = ".cuf_host_tmp"} : (!hlfir.expr<10xi32>, !fir.shape<1>) -> (!fir.ref<!fir.array<10xi32>>, !fir.ref<!fir.array<10xi32>>, i1)
+! CHECK: fir.cuda_data_transfer %[[ASSOC]]#0 to %[[ADEV]]#0 {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.ref<!fir.array<10xi32>>, !fir.ref<!fir.array<10xi32>>
+! CHECK: hlfir.end_associate %[[ASSOC]]#1, %[[ASSOC]]#2 : !fir.ref<!fir.array<10xi32>>, i1
! CHECK: %[[DES_AHOST:.*]] = hlfir.designate %[[AHOST]]#0 (%c1{{.*}}:%c5{{.*}}:%c1{{.*}}) shape %{{.*}} : (!fir.ref<!fir.array<10xi32>>, index, index, index, !fir.shape<1>) -> !fir.ref<!fir.array<5xi32>>
! CHECK: %[[DES_ADEV:.*]] = hlfir.designate %[[ADEV]]#0 (%c1{{.*}}:%c5{{.*}}:%c1{{.*}}) shape %{{.*}} : (!fir.ref<!fir.array<10xi32>>, index, index, index, !fir.shape<1>) -> !fir.ref<!fir.array<5xi32>>
! CHECK: fir.cuda_data_transfer %[[DES_AHOST]] to %[[DES_ADEV]] {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.ref<!fir.array<5xi32>>, !fir.ref<!fir.array<5xi32>>
-! CHECK: %[[ELEMENTAL:.*]] = hlfir.elemental %{{.*}} unordered : (!fir.shape<1>) -> !hlfir.expr<10xi32> {
-! CHECK: %[[ALLOCMEM:.*]] = fir.allocmem !fir.array<10xi32> {bindc_name = ".tmp", uniq_name = ""}
-! CHECK: %[[TEMP:.*]]:2 = hlfir.declare %[[ALLOCMEM]](%{{.*}}) {uniq_name = ".tmp"} : (!fir.heap<!fir.array<10xi32>>, !fir.shape<1>) -> (!fir.heap<!fir.array<10xi32>>, !fir.heap<!fir.array<10xi32>>)
-! CHECK: hlfir.assign %[[ELEMENTAL]] to %[[TEMP]]#0 : !hlfir.expr<10xi32>, !fir.heap<!fir.array<10xi32>>
-! CHECK: fir.cuda_data_transfer %[[TEMP]]#0 to %[[ADEV]]#0 {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.heap<!fir.array<10xi32>>, !fir.ref<!fir.array<10xi32>>
-! CHECK: fir.freemem %[[TEMP]]#0 : !fir.heap<!fir.array<10xi32>>
+! CHECK: %[[ELEMENTAL:.*]] = hlfir.elemental %{{.*}} unordered : (!fir.shape<1>) -> !hlfir.expr<10xi32>
+! CHECK: %[[ASSOC:.*]]:3 = hlfir.associate %[[ELEMENTAL]](%{{.*}}) {uniq_name = ".cuf_host_tmp"} : (!hlfir.expr<10xi32>, !fir.shape<1>) -> (!fir.ref<!fir.array<10xi32>>, !fir.ref<!fir.array<10xi32>>, i1)
+! CHECK: fir.cuda_data_transfer %[[ASSOC]]#0 to %[[ADEV]]#0 {transfer_kind = #fir.cuda_transfer<host_device>} : !fir.ref<!fir.array<10xi32>>, !fir.ref<!fir.array<10xi32>>
+! CHECK: hlfir.end_associate %[[ASSOC]]#1, %[[ASSOC]]#2 : !fir.ref<!fir.array<10xi32>>, i1
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