[flang-commits] [libcxx] [libcxxabi] [lld] [compiler-rt] [clang] [llvm] [clang-tools-extra] [libc] [libunwind] [flang] [PowerPC] Combine sub within setcc back to sext (PR #66978)

[Kai Luo via flang-commits]

================
@@ -14428,15 +14431,53 @@ SDValue PPCTargetLowering::combineSetCC(SDNode *N,
     // x != 0-y --> x+y != 0
     if (RHS.getOpcode() == ISD::SUB && isNullConstant(RHS.getOperand(0)) &&
         RHS.hasOneUse()) {
-      SDLoc DL(N);
-      SelectionDAG &DAG = DCI.DAG;
-      EVT VT = N->getValueType(0);
-      EVT OpVT = LHS.getValueType();
       SDValue Add = DAG.getNode(ISD::ADD, DL, OpVT, LHS, RHS.getOperand(1));
       return DAG.getSetCC(DL, VT, Add, DAG.getConstant(0, DL, OpVT), CC);
     }
   }
 
+  if (CC == ISD::SETULT && isa<ConstantSDNode>(RHS)) {
+    uint64_t RHSVal = cast<ConstantSDNode>(RHS)->getZExtValue();
+    if (LHS.getOpcode() == ISD::ADD && isa<ConstantSDNode>(LHS.getOperand(1))) {
+      uint64_t Addend = cast<ConstantSDNode>(LHS.getOperand(1))->getZExtValue();
+      if (OpVT == MVT::i64) {
+        // (a-2^(M-1)) => sext(trunc(a, M), 64)
+        uint64_t ShiftVal = ~Addend + 1;
+        uint64_t CmpVal = ~RHSVal + 1;
+        if (isPowerOf2_64(ShiftVal) && ShiftVal << 1 == CmpVal) {
+          unsigned DestBits = Log2_64(CmpVal);
+          if (DestBits == 8 || DestBits == 16 || DestBits == 32) {
+            SDValue Conv = DAG.getSExtOrTrunc(
+                DAG.getSExtOrTrunc(LHS.getOperand(0), DL,
+                                   MVT::getIntegerVT(DestBits)),
+                DL, OpVT);
+            return DAG.getSetCC(DL, VT, LHS.getOperand(0), Conv, ISD::SETNE);
+          }
+        }
+      } else if (OpVT == MVT::i32) {
+        if (RHSVal == 0xffffff00 && Addend == 0xffffff80) {
+          SDValue Conv = DAG.getSExtOrTrunc(
+              DAG.getSExtOrTrunc(LHS.getOperand(0), DL, MVT::i8), DL, OpVT);
+          return DAG.getSetCC(DL, VT, LHS.getOperand(0), Conv, ISD::SETNE);
+        }
+      }
+    } else if (LHS.getOpcode() == ISD::SRL &&
+               LHS.getOperand(0).getOpcode() == ISD::ADD &&
+               isa<ConstantSDNode>(LHS.getOperand(1)) &&
+               isa<ConstantSDNode>(LHS.getOperand(0).getOperand(1))) {
+      if (RHSVal == 65535 &&
----------------
bzEq wrote:

```suggestion
      if (RHSVal == 0xff &&
```

https://github.com/llvm/llvm-project/pull/66978