[flang-commits] [flang] 46e1b09 - [mlir][openacc] Cleanup acc.data from old data clause operands
Valentin Clement via flang-commits
flang-commits at lists.llvm.org
Tue May 9 13:21:43 PDT 2023
Author: Valentin Clement
Date: 2023-05-09T13:21:37-07:00
New Revision: 46e1b095c90ccab695324e7e365e5d3e364d5c1a
URL: https://github.com/llvm/llvm-project/commit/46e1b095c90ccab695324e7e365e5d3e364d5c1a
DIFF: https://github.com/llvm/llvm-project/commit/46e1b095c90ccab695324e7e365e5d3e364d5c1a.diff
LOG: [mlir][openacc] Cleanup acc.data from old data clause operands
Since the new data operand operations have been added in D148389 and
adopted on acc.data in D149673, the old clause operands are no longer
needed.
The LegalizeDataOpForLLVMTranslation will become obsolete when all
operations will be cleaned. For the time being only the appropriate
part are being removed.
processOperands will also receive some updates once all the operands
will be coming from an acc data operand operation.
Reviewed By: razvanlupusoru
Differential Revision: https://reviews.llvm.org/D150155
Added:
Modified:
flang/lib/Lower/OpenACC.cpp
flang/lib/Optimizer/Transforms/OpenACC/OpenACCDataOperandConversion.cpp
flang/test/Transforms/OpenACC/convert-data-operands-to-llvmir.fir
mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
mlir/lib/Conversion/OpenACCToLLVM/OpenACCToLLVM.cpp
mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
mlir/lib/Target/LLVMIR/Dialect/OpenACC/OpenACCToLLVMIRTranslation.cpp
mlir/test/Conversion/OpenACCToLLVM/convert-data-operands-to-llvmir.mlir
mlir/test/Dialect/OpenACC/ops.mlir
mlir/test/Target/LLVMIR/openacc-llvm.mlir
Removed:
################################################################################
diff --git a/flang/lib/Lower/OpenACC.cpp b/flang/lib/Lower/OpenACC.cpp
index faf1b7c024679..9bb18d2ece383 100644
--- a/flang/lib/Lower/OpenACC.cpp
+++ b/flang/lib/Lower/OpenACC.cpp
@@ -1122,7 +1122,6 @@ static void genACCDataOp(Fortran::lower::AbstractConverter &converter,
llvm::SmallVector<mlir::Value> operands;
llvm::SmallVector<int32_t> operandSegments;
addOperand(operands, operandSegments, ifCond);
- operandSegments.append({0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0});
addOperands(operands, operandSegments, dataClauseOperands);
auto dataOp = createRegionOp<mlir::acc::DataOp, mlir::acc::TerminatorOp>(
diff --git a/flang/lib/Optimizer/Transforms/OpenACC/OpenACCDataOperandConversion.cpp b/flang/lib/Optimizer/Transforms/OpenACC/OpenACCDataOperandConversion.cpp
index cbde992df95bc..8459ac2aa48d5 100644
--- a/flang/lib/Optimizer/Transforms/OpenACC/OpenACCDataOperandConversion.cpp
+++ b/flang/lib/Optimizer/Transforms/OpenACC/OpenACCDataOperandConversion.cpp
@@ -115,7 +115,6 @@ void OpenACCDataOperandConversion::runOnOperation() {
options.useOpaquePointers = useOpaquePointers;
fir::LLVMTypeConverter converter(
op.getOperation()->getParentOfType<mlir::ModuleOp>(), true);
- patterns.add<LegalizeDataOpForLLVMTranslation<acc::DataOp>>(converter);
patterns.add<LegalizeDataOpForLLVMTranslation<acc::ParallelOp>>(converter);
ConversionTarget target(*context);
@@ -131,21 +130,6 @@ void OpenACCDataOperandConversion::runOnOperation() {
return true;
};
- target.addDynamicallyLegalOp<acc::DataOp>(
- [allDataOperandsAreConverted](acc::DataOp op) {
- return allDataOperandsAreConverted(op.getCopyOperands()) &&
- allDataOperandsAreConverted(op.getCopyinOperands()) &&
- allDataOperandsAreConverted(op.getCopyinReadonlyOperands()) &&
- allDataOperandsAreConverted(op.getCopyoutOperands()) &&
- allDataOperandsAreConverted(op.getCopyoutZeroOperands()) &&
- allDataOperandsAreConverted(op.getCreateOperands()) &&
- allDataOperandsAreConverted(op.getCreateZeroOperands()) &&
- allDataOperandsAreConverted(op.getNoCreateOperands()) &&
- allDataOperandsAreConverted(op.getPresentOperands()) &&
- allDataOperandsAreConverted(op.getDeviceptrOperands()) &&
- allDataOperandsAreConverted(op.getAttachOperands());
- });
-
target.addDynamicallyLegalOp<acc::ParallelOp>(
[allDataOperandsAreConverted](acc::ParallelOp op) {
return allDataOperandsAreConverted(op.getReductionOperands()) &&
diff --git a/flang/test/Transforms/OpenACC/convert-data-operands-to-llvmir.fir b/flang/test/Transforms/OpenACC/convert-data-operands-to-llvmir.fir
index 26a53bad31180..f691ea6667d94 100644
--- a/flang/test/Transforms/OpenACC/convert-data-operands-to-llvmir.fir
+++ b/flang/test/Transforms/OpenACC/convert-data-operands-to-llvmir.fir
@@ -6,30 +6,6 @@ fir.global internal @_QFEa : !fir.array<10xf32> {
fir.has_value %0 : !fir.array<10xf32>
}
-func.func @_QQsub1() attributes {fir.bindc_name = "arr"} {
- %0 = fir.address_of(@_QFEa) : !fir.ref<!fir.array<10xf32>>
- acc.data copy(%0 : !fir.ref<!fir.array<10xf32>>) {
- acc.terminator
- }
- return
-}
-
-// CHECK-LABEL: func.func @_QQsub1() attributes {fir.bindc_name = "arr"} {
-// CHECK: %[[ADDR:.*]] = fir.address_of(@_QFEa) : !fir.ref<!fir.array<10xf32>>
-// CHECK: %[[CAST:.*]] = builtin.unrealized_conversion_cast %[[ADDR]] : !fir.ref<!fir.array<10xf32>> to !llvm.ptr<array<10 x f32>>
-// CHECK: acc.data copy(%[[CAST]] : !llvm.ptr<array<10 x f32>>)
-
-// LLVMIR-LABEL: llvm.func @_QQsub1() attributes {fir.bindc_name = "arr"} {
-// LLVMIR: %[[ADDR:.*]] = llvm.mlir.addressof @_QFEa : !llvm.ptr<array<10 x f32>>
-// LLVMIR: acc.data copy(%[[ADDR]] : !llvm.ptr<array<10 x f32>>) {
-
-// -----
-
-fir.global internal @_QFEa : !fir.array<10xf32> {
- %0 = fir.undefined !fir.array<10xf32>
- fir.has_value %0 : !fir.array<10xf32>
-}
-
func.func @_QQsub_parallel() attributes {fir.bindc_name = "test"} {
%0 = fir.address_of(@_QFEa) : !fir.ref<!fir.array<10xf32>>
%1 = fir.alloca i32 {bindc_name = "i", uniq_name = "_QFEi"}
diff --git a/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td b/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
index 869e4af24a0f6..39a5bba6cefc4 100644
--- a/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
+++ b/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
@@ -681,17 +681,6 @@ def OpenACC_DataOp : OpenACC_Op<"data",
let arguments = (ins Optional<I1>:$ifCond,
- Variadic<AnyType>:$copyOperands,
- Variadic<AnyType>:$copyinOperands,
- Variadic<AnyType>:$copyinReadonlyOperands,
- Variadic<AnyType>:$copyoutOperands,
- Variadic<AnyType>:$copyoutZeroOperands,
- Variadic<AnyType>:$createOperands,
- Variadic<AnyType>:$createZeroOperands,
- Variadic<AnyType>:$noCreateOperands,
- Variadic<AnyType>:$presentOperands,
- Variadic<AnyType>:$deviceptrOperands,
- Variadic<AnyType>:$attachOperands,
Variadic<OpenACC_PointerLikeTypeInterface>:$dataClauseOperands,
OptionalAttr<DefaultValueAttr>:$defaultAttr);
@@ -709,20 +698,6 @@ def OpenACC_DataOp : OpenACC_Op<"data",
oilist(
`if` `(` $ifCond `)`
| `dataOperands` `(` $dataClauseOperands `:` type($dataClauseOperands) `)`
- | `copy` `(` $copyOperands `:` type($copyOperands) `)`
- | `copyin` `(` $copyinOperands `:` type($copyinOperands) `)`
- | `copyin_readonly` `(` $copyinReadonlyOperands `:`
- type($copyinReadonlyOperands) `)`
- | `copyout` `(` $copyoutOperands `:` type($copyoutOperands) `)`
- | `copyout_zero` `(` $copyoutZeroOperands `:`
- type($copyoutZeroOperands) `)`
- | `create` `(` $createOperands `:` type($createOperands) `)`
- | `create_zero` `(` $createZeroOperands `:`
- type($createZeroOperands) `)`
- | `no_create` `(` $noCreateOperands `:` type($noCreateOperands) `)`
- | `present` `(` $presentOperands `:` type($presentOperands) `)`
- | `deviceptr` `(` $deviceptrOperands `:` type($deviceptrOperands) `)`
- | `attach` `(` $attachOperands `:` type($attachOperands) `)`
)
$region attr-dict-with-keyword
}];
diff --git a/mlir/lib/Conversion/OpenACCToLLVM/OpenACCToLLVM.cpp b/mlir/lib/Conversion/OpenACCToLLVM/OpenACCToLLVM.cpp
index 63eaf81570202..e1283d237d90d 100644
--- a/mlir/lib/Conversion/OpenACCToLLVM/OpenACCToLLVM.cpp
+++ b/mlir/lib/Conversion/OpenACCToLLVM/OpenACCToLLVM.cpp
@@ -155,7 +155,6 @@ class LegalizeDataOpForLLVMTranslation : public ConvertOpToLLVMPattern<Op> {
void mlir::populateOpenACCToLLVMConversionPatterns(
LLVMTypeConverter &converter, RewritePatternSet &patterns) {
- patterns.add<LegalizeDataOpForLLVMTranslation<acc::DataOp>>(converter);
patterns.add<LegalizeDataOpForLLVMTranslation<acc::ParallelOp>>(converter);
}
@@ -192,21 +191,6 @@ void ConvertOpenACCToLLVMPass::runOnOperation() {
return true;
};
- target.addDynamicallyLegalOp<acc::DataOp>(
- [allDataOperandsAreConverted](acc::DataOp op) {
- return allDataOperandsAreConverted(op.getCopyOperands()) &&
- allDataOperandsAreConverted(op.getCopyinOperands()) &&
- allDataOperandsAreConverted(op.getCopyinReadonlyOperands()) &&
- allDataOperandsAreConverted(op.getCopyoutOperands()) &&
- allDataOperandsAreConverted(op.getCopyoutZeroOperands()) &&
- allDataOperandsAreConverted(op.getCreateOperands()) &&
- allDataOperandsAreConverted(op.getCreateZeroOperands()) &&
- allDataOperandsAreConverted(op.getNoCreateOperands()) &&
- allDataOperandsAreConverted(op.getPresentOperands()) &&
- allDataOperandsAreConverted(op.getDeviceptrOperands()) &&
- allDataOperandsAreConverted(op.getAttachOperands());
- });
-
target.addDynamicallyLegalOp<acc::ParallelOp>(
[allDataOperandsAreConverted](acc::ParallelOp op) {
return allDataOperandsAreConverted(op.getReductionOperands()) &&
diff --git a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
index 16528e8e3f7cd..df32d8890ddb4 100644
--- a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
+++ b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
@@ -520,14 +520,7 @@ LogicalResult acc::DataOp::verify() {
return success();
}
-unsigned DataOp::getNumDataOperands() {
- return getCopyOperands().size() + getCopyinOperands().size() +
- getCopyinReadonlyOperands().size() + getCopyoutOperands().size() +
- getCopyoutZeroOperands().size() + getCreateOperands().size() +
- getCreateZeroOperands().size() + getNoCreateOperands().size() +
- getPresentOperands().size() + getDeviceptrOperands().size() +
- getAttachOperands().size() + getDataClauseOperands().size();
-}
+unsigned DataOp::getNumDataOperands() { return getDataClauseOperands().size(); }
Value DataOp::getDataOperand(unsigned i) {
unsigned numOptional = getIfCond() ? 1 : 0;
diff --git a/mlir/lib/Target/LLVMIR/Dialect/OpenACC/OpenACCToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/OpenACC/OpenACCToLLVMIRTranslation.cpp
index 09f89b8164f23..d5d6c82980903 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/OpenACC/OpenACCToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/OpenACC/OpenACCToLLVMIRTranslation.cpp
@@ -306,57 +306,66 @@ static LogicalResult convertDataOp(acc::DataOp &op,
// TODO handle no_create, deviceptr and attach operands.
- if (failed(processOperands(
- builder, moduleTranslation, op, op.getCopyOperands(), totalNbOperand,
- kCopyFlag | kHoldFlag, flags, names, index, mapperAllocas)))
- return failure();
-
- if (failed(processOperands(builder, moduleTranslation, op,
- op.getCopyinOperands(), totalNbOperand,
- kDeviceCopyinFlag | kHoldFlag, flags, names, index,
- mapperAllocas)))
- return failure();
+ llvm::SmallVector<mlir::Value> copyin, copyout, create, present,
+ deleteOperands;
+ for (mlir::Value dataOp : op.getDataClauseOperands()) {
+ if (auto devicePtrOp = mlir::dyn_cast_or_null<acc::GetDevicePtrOp>(
+ dataOp.getDefiningOp())) {
+ for (auto &u : devicePtrOp.getAccPtr().getUses()) {
+ if (mlir::dyn_cast_or_null<acc::DeleteOp>(u.getOwner())) {
+ deleteOperands.push_back(devicePtrOp.getVarPtr());
+ } else if (mlir::dyn_cast_or_null<acc::CopyoutOp>(u.getOwner())) {
+ // TODO copyout zero currenlty handled as copyout. Update when
+ // extension available.
+ copyout.push_back(devicePtrOp.getVarPtr());
+ }
+ }
+ } else if (auto copyinOp = mlir::dyn_cast_or_null<acc::CopyinOp>(
+ dataOp.getDefiningOp())) {
+ // TODO copyin readonly currenlty handled as copyin. Update when extension
+ // available.
+ copyin.push_back(copyinOp.getVarPtr());
+ } else if (auto createOp = mlir::dyn_cast_or_null<acc::CreateOp>(
+ dataOp.getDefiningOp())) {
+ // TODO create zero currenlty handled as create. Update when extension
+ // available.
+ create.push_back(createOp.getVarPtr());
+ } else if (auto presentOp = mlir::dyn_cast_or_null<acc::PresentOp>(
+ dataOp.getDefiningOp())) {
+ present.push_back(createOp.getVarPtr());
+ }
+ }
- // TODO copyin readonly currenlty handled as copyin. Update when extension
- // available.
- if (failed(processOperands(builder, moduleTranslation, op,
- op.getCopyinReadonlyOperands(), totalNbOperand,
- kDeviceCopyinFlag | kHoldFlag, flags, names, index,
- mapperAllocas)))
- return failure();
+ auto nbTotalOperands = copyin.size() + copyout.size() + create.size() +
+ present.size() + deleteOperands.size();
- if (failed(processOperands(builder, moduleTranslation, op,
- op.getCopyoutOperands(), totalNbOperand,
- kHostCopyoutFlag | kHoldFlag, flags, names, index,
- mapperAllocas)))
+ // Copyin operands are handled as `to` call.
+ if (failed(processOperands(builder, moduleTranslation, op, copyin,
+ nbTotalOperands, kDeviceCopyinFlag | kHoldFlag,
+ flags, names, index, mapperAllocas)))
return failure();
- // TODO copyout zero currenlty handled as copyout. Update when extension
- // available.
- if (failed(processOperands(builder, moduleTranslation, op,
- op.getCopyoutZeroOperands(), totalNbOperand,
- kHostCopyoutFlag | kHoldFlag, flags, names, index,
+ // Delete operands are handled as `delete` call.
+ if (failed(processOperands(builder, moduleTranslation, op, deleteOperands,
+ nbTotalOperands, kDeleteFlag, flags, names, index,
mapperAllocas)))
return failure();
- if (failed(processOperands(builder, moduleTranslation, op,
- op.getCreateOperands(), totalNbOperand,
- kCreateFlag | kHoldFlag, flags, names, index,
- mapperAllocas)))
+ // Copyout operands are handled as `from` call.
+ if (failed(processOperands(builder, moduleTranslation, op, copyout,
+ nbTotalOperands, kHostCopyoutFlag | kHoldFlag,
+ flags, names, index, mapperAllocas)))
return failure();
- // TODO create zero currenlty handled as create. Update when extension
- // available.
- if (failed(processOperands(builder, moduleTranslation, op,
- op.getCreateZeroOperands(), totalNbOperand,
- kCreateFlag | kHoldFlag, flags, names, index,
- mapperAllocas)))
+ // Create operands are handled as `alloc` call.
+ if (failed(processOperands(builder, moduleTranslation, op, create,
+ nbTotalOperands, kCreateFlag | kHoldFlag, flags,
+ names, index, mapperAllocas)))
return failure();
- if (failed(processOperands(builder, moduleTranslation, op,
- op.getPresentOperands(), totalNbOperand,
- kPresentFlag | kHoldFlag, flags, names, index,
- mapperAllocas)))
+ if (failed(processOperands(builder, moduleTranslation, op, present,
+ nbTotalOperands, kPresentFlag | kHoldFlag, flags,
+ names, index, mapperAllocas)))
return failure();
llvm::GlobalVariable *maptypes =
diff --git a/mlir/test/Conversion/OpenACCToLLVM/convert-data-operands-to-llvmir.mlir b/mlir/test/Conversion/OpenACCToLLVM/convert-data-operands-to-llvmir.mlir
index 4a4cb0c17c278..093149ae06b4f 100644
--- a/mlir/test/Conversion/OpenACCToLLVM/convert-data-operands-to-llvmir.mlir
+++ b/mlir/test/Conversion/OpenACCToLLVM/convert-data-operands-to-llvmir.mlir
@@ -1,63 +1,5 @@
// RUN: mlir-opt -convert-openacc-to-llvm='use-opaque-pointers=1' -split-input-file %s | FileCheck %s
-func.func @testdataregion(%a: memref<10xf32>, %b: memref<10xf32>) -> () {
- acc.data copy(%b : memref<10xf32>) copyout(%a : memref<10xf32>) {
- acc.parallel {
- acc.yield
- }
- acc.terminator
- }
- return
-}
-
-// CHECK: acc.data copy(%{{.*}} : !llvm.struct<"openacc_data", (struct<(ptr, ptr, i64, array<1 x i64>, array<1 x i64>)>, ptr, i64)>) copyout(%{{.*}} : !llvm.struct<"openacc_data.1", (struct<(ptr, ptr, i64, array<1 x i64>, array<1 x i64>)>, ptr, i64)>)
-// CHECK: acc.parallel
-// CHECK: acc.yield
-// CHECK: acc.terminator
-
-// -----
-
-func.func @testdataregion(%a: !llvm.ptr, %b: memref<10xf32>, %c: !llvm.ptr) -> () {
- acc.data copyin(%b : memref<10xf32>) deviceptr(%c: !llvm.ptr) attach(%a : !llvm.ptr) {
- }
- return
-}
-
-// CHECK: acc.data copyin(%{{.*}} : !llvm.struct<"openacc_data", (struct<(ptr, ptr, i64, array<1 x i64>, array<1 x i64>)>, ptr, i64)>) deviceptr(%{{.*}} : !llvm.ptr) attach(%{{.*}} : !llvm.ptr)
-
-// -----
-
-func.func @testdataregion(%a: memref<10xf32>, %b: memref<10xf32>) -> () {
- %ifCond = arith.constant true
- acc.data if(%ifCond) copyin_readonly(%b : memref<10xf32>) copyout_zero(%a : memref<10xf32>) {
- }
- return
-}
-
-// CHECK: acc.data if(%{{.*}}) copyin_readonly(%{{.*}} : !llvm.struct<"openacc_data", (struct<(ptr, ptr, i64, array<1 x i64>, array<1 x i64>)>, ptr, i64)>) copyout_zero(%{{.*}} : !llvm.struct<"openacc_data.1", (struct<(ptr, ptr, i64, array<1 x i64>, array<1 x i64>)>, ptr, i64)>)
-
-// -----
-
-func.func @testdataregion(%a: !llvm.ptr, %b: memref<10xf32>, %c: !llvm.ptr) -> () {
- acc.data create(%b : memref<10xf32>) create_zero(%c: !llvm.ptr) no_create(%a : !llvm.ptr) {
- }
- return
-}
-
-// CHECK: acc.data create(%{{.*}} : !llvm.struct<"openacc_data", (struct<(ptr, ptr, i64, array<1 x i64>, array<1 x i64>)>, ptr, i64)>) create_zero(%{{.*}} : !llvm.ptr) no_create(%{{.*}} : !llvm.ptr)
-
-// -----
-
-func.func @testdataregion(%a: memref<10xf32>, %b: memref<10xf32>) -> () {
- acc.data present(%a, %b : memref<10xf32>, memref<10xf32>) {
- }
- return
-}
-
-// CHECK: acc.data present(%{{.*}}, %{{.*}} : !llvm.struct<"openacc_data", (struct<(ptr, ptr, i64, array<1 x i64>, array<1 x i64>)>, ptr, i64)>, !llvm.struct<"openacc_data.1", (struct<(ptr, ptr, i64, array<1 x i64>, array<1 x i64>)>, ptr, i64)>)
-
-// -----
-
func.func @testparallelop(%a: memref<10xf32>, %b: memref<10xf32>) -> () {
acc.parallel copy(%b : memref<10xf32>) copyout(%a : memref<10xf32>) {
}
diff --git a/mlir/test/Dialect/OpenACC/ops.mlir b/mlir/test/Dialect/OpenACC/ops.mlir
index 1c52774fe6a46..5913e09ec4ff8 100644
--- a/mlir/test/Dialect/OpenACC/ops.mlir
+++ b/mlir/test/Dialect/OpenACC/ops.mlir
@@ -121,7 +121,11 @@ func.func @compute3(%a: memref<10x10xf32>, %b: memref<10x10xf32>, %c: memref<10x
%numGangs = arith.constant 10 : i64
%numWorkers = arith.constant 10 : i64
- acc.data present(%a, %b, %c, %d: memref<10x10xf32>, memref<10x10xf32>, memref<10xf32>, memref<10xf32>) {
+ %pa = acc.present varPtr(%a : memref<10x10xf32>) -> memref<10x10xf32>
+ %pb = acc.present varPtr(%b : memref<10x10xf32>) -> memref<10x10xf32>
+ %pc = acc.present varPtr(%c : memref<10xf32>) -> memref<10xf32>
+ %pd = acc.present varPtr(%d : memref<10xf32>) -> memref<10xf32>
+ acc.data dataOperands(%pa, %pb, %pc, %pd: memref<10x10xf32>, memref<10x10xf32>, memref<10xf32>, memref<10xf32>) {
acc.parallel num_gangs(%numGangs: i64) num_workers(%numWorkers: i64) private(%c : memref<10xf32>) {
acc.loop gang {
scf.for %x = %lb to %c10 step %st {
@@ -163,7 +167,7 @@ func.func @compute3(%a: memref<10x10xf32>, %b: memref<10x10xf32>, %c: memref<10x
// CHECK-NEXT: [[C10:%.*]] = arith.constant 10 : index
// CHECK-NEXT: [[NUMGANG:%.*]] = arith.constant 10 : i64
// CHECK-NEXT: [[NUMWORKERS:%.*]] = arith.constant 10 : i64
-// CHECK-NEXT: acc.data present(%{{.*}}, %{{.*}}, %{{.*}}, %{{.*}} : memref<10x10xf32>, memref<10x10xf32>, memref<10xf32>, memref<10xf32>) {
+// CHECK: acc.data dataOperands(%{{.*}}, %{{.*}}, %{{.*}}, %{{.*}} : memref<10x10xf32>, memref<10x10xf32>, memref<10xf32>, memref<10xf32>) {
// CHECK-NEXT: acc.parallel num_gangs([[NUMGANG]] : i64) num_workers([[NUMWORKERS]] : i64) private([[ARG2]] : memref<10xf32>) {
// CHECK-NEXT: acc.loop gang {
// CHECK-NEXT: scf.for %{{.*}} = [[C0]] to [[C10]] step [[C1]] {
@@ -683,79 +687,203 @@ func.func @testserialop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10
// -----
-func.func @testdataop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10xf32>) -> () {
+func.func @testdataop(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> () {
%ifCond = arith.constant true
- acc.data if(%ifCond) present(%a : memref<10xf32>) {
- }
- acc.data present(%a : memref<10xf32>) if(%ifCond) {
+
+ %0 = acc.present varPtr(%a : memref<f32>) -> memref<f32>
+ acc.data if(%ifCond) dataOperands(%0 : memref<f32>) {
}
- acc.data present(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+ %1 = acc.present varPtr(%a : memref<f32>) -> memref<f32>
+ acc.data dataOperands(%1 : memref<f32>) if(%ifCond) {
}
- acc.data copy(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+ %2 = acc.present varPtr(%a : memref<f32>) -> memref<f32>
+ %3 = acc.present varPtr(%b : memref<f32>) -> memref<f32>
+ %4 = acc.present varPtr(%c : memref<f32>) -> memref<f32>
+ acc.data dataOperands(%2, %3, %4 : memref<f32>, memref<f32>, memref<f32>) {
}
- acc.data copyin(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+ %5 = acc.copyin varPtr(%a : memref<f32>) -> memref<f32>
+ %6 = acc.copyin varPtr(%b : memref<f32>) -> memref<f32>
+ %7 = acc.copyin varPtr(%c : memref<f32>) -> memref<f32>
+ acc.data dataOperands(%5, %6, %7 : memref<f32>, memref<f32>, memref<f32>) {
}
- acc.data copyin_readonly(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+ %8 = acc.copyin varPtr(%a : memref<f32>) -> memref<f32> {dataClause = 2 : i64}
+ %9 = acc.copyin varPtr(%b : memref<f32>) -> memref<f32> {dataClause = 2 : i64}
+ %10 = acc.copyin varPtr(%c : memref<f32>) -> memref<f32> {dataClause = 2 : i64}
+ acc.data dataOperands(%8, %9, %10 : memref<f32>, memref<f32>, memref<f32>) {
}
- acc.data copyout(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+ %11 = acc.create varPtr(%a : memref<f32>) -> memref<f32> {dataClause = 4 : i64}
+ %12 = acc.create varPtr(%b : memref<f32>) -> memref<f32> {dataClause = 4 : i64}
+ %13 = acc.create varPtr(%c : memref<f32>) -> memref<f32> {dataClause = 4 : i64}
+ acc.data dataOperands(%11, %12, %13 : memref<f32>, memref<f32>, memref<f32>) {
}
- acc.data copyout_zero(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+ acc.copyout accPtr(%11 : memref<f32>) to varPtr(%a : memref<f32>)
+ acc.copyout accPtr(%12 : memref<f32>) to varPtr(%b : memref<f32>)
+ acc.copyout accPtr(%13 : memref<f32>) to varPtr(%c : memref<f32>)
+
+ %14 = acc.create varPtr(%a : memref<f32>) -> memref<f32> {dataClause = 5 : i64}
+ %15 = acc.create varPtr(%b : memref<f32>) -> memref<f32> {dataClause = 5 : i64}
+ %16 = acc.create varPtr(%c : memref<f32>) -> memref<f32> {dataClause = 5 : i64}
+ acc.data dataOperands(%14, %15, %16 : memref<f32>, memref<f32>, memref<f32>) {
}
- acc.data create(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+ acc.copyout accPtr(%14 : memref<f32>) to varPtr(%a : memref<f32>) {dataClause = 5 : i64}
+ acc.copyout accPtr(%15 : memref<f32>) to varPtr(%b : memref<f32>) {dataClause = 5 : i64}
+ acc.copyout accPtr(%16 : memref<f32>) to varPtr(%c : memref<f32>) {dataClause = 5 : i64}
+
+ %17 = acc.create varPtr(%a : memref<f32>) -> memref<f32>
+ %18 = acc.create varPtr(%b : memref<f32>) -> memref<f32>
+ %19 = acc.create varPtr(%c : memref<f32>) -> memref<f32>
+ acc.data dataOperands(%17, %18, %19 : memref<f32>, memref<f32>, memref<f32>) {
}
- acc.data create_zero(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+ acc.delete accPtr(%17 : memref<f32>) {dataClause = 7 : i64}
+ acc.delete accPtr(%18 : memref<f32>) {dataClause = 7 : i64}
+ acc.delete accPtr(%19 : memref<f32>) {dataClause = 7 : i64}
+
+ %20 = acc.create varPtr(%a : memref<f32>) -> memref<f32> {dataClause = 8 : i64}
+ %21 = acc.create varPtr(%b : memref<f32>) -> memref<f32> {dataClause = 8 : i64}
+ %22 = acc.create varPtr(%c : memref<f32>) -> memref<f32> {dataClause = 8 : i64}
+ acc.data dataOperands(%20, %21, %22 : memref<f32>, memref<f32>, memref<f32>) {
}
- acc.data no_create(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+ acc.delete accPtr(%20 : memref<f32>) {dataClause = 8 : i64}
+ acc.delete accPtr(%21 : memref<f32>) {dataClause = 8 : i64}
+ acc.delete accPtr(%22 : memref<f32>) {dataClause = 8 : i64}
+
+ %23 = acc.nocreate varPtr(%a : memref<f32>) -> memref<f32>
+ %24 = acc.nocreate varPtr(%b : memref<f32>) -> memref<f32>
+ %25 = acc.nocreate varPtr(%c : memref<f32>) -> memref<f32>
+ acc.data dataOperands(%23, %24, %25 : memref<f32>, memref<f32>, memref<f32>) {
}
- acc.data deviceptr(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+ %26 = acc.deviceptr varPtr(%a : memref<f32>) -> memref<f32>
+ %27 = acc.deviceptr varPtr(%b : memref<f32>) -> memref<f32>
+ %28 = acc.deviceptr varPtr(%c : memref<f32>) -> memref<f32>
+ acc.data dataOperands(%26, %27, %28 : memref<f32>, memref<f32>, memref<f32>) {
}
- acc.data attach(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+ %29 = acc.attach varPtr(%a : memref<f32>) -> memref<f32>
+ %30 = acc.attach varPtr(%b : memref<f32>) -> memref<f32>
+ %31 = acc.attach varPtr(%c : memref<f32>) -> memref<f32>
+ acc.data dataOperands(%29, %30, %31 : memref<f32>, memref<f32>, memref<f32>) {
}
- acc.data copyin(%b: memref<10xf32>) copyout(%c: memref<10x10xf32>) present(%a: memref<10xf32>) {
+
+ %32 = acc.copyin varPtr(%a : memref<f32>) -> memref<f32>
+ %33 = acc.create varPtr(%b : memref<f32>) -> memref<f32> {dataClause = 4 : i64}
+ %34 = acc.present varPtr(%c : memref<f32>) -> memref<f32>
+ acc.data dataOperands(%32, %33, %34 : memref<f32>, memref<f32>, memref<f32>) {
}
- acc.data present(%a : memref<10xf32>) {
+ acc.copyout accPtr(%33 : memref<f32>) to varPtr(%b : memref<f32>)
+
+ %35 = acc.present varPtr(%a : memref<f32>) -> memref<f32>
+ acc.data dataOperands(%35 : memref<f32>) {
} attributes { defaultAttr = #acc<defaultvalue none> }
- acc.data present(%a : memref<10xf32>) {
+
+
+ %36 = acc.present varPtr(%a : memref<f32>) -> memref<f32>
+ acc.data dataOperands(%36 : memref<f32>) {
} attributes { defaultAttr = #acc<defaultvalue present> }
+
acc.data {
} attributes { defaultAttr = #acc<defaultvalue none> }
return
}
-// CHECK: func @testdataop([[ARGA:%.*]]: memref<10xf32>, [[ARGB:%.*]]: memref<10xf32>, [[ARGC:%.*]]: memref<10x10xf32>) {
-// CHECK: [[IFCOND1:%.*]] = arith.constant true
-// CHECK: acc.data if([[IFCOND1]]) present([[ARGA]] : memref<10xf32>) {
-// CHECK-NEXT: }
-// CHECK: acc.data if([[IFCOND1]]) present([[ARGA]] : memref<10xf32>) {
+// CHECK: func @testdataop(%[[ARGA:.*]]: memref<f32>, %[[ARGB:.*]]: memref<f32>, %[[ARGC:.*]]: memref<f32>) {
+
+// CHECK: %[[IFCOND1:.*]] = arith.constant true
+// CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
+// CHECK: acc.data if(%[[IFCOND1]]) dataOperands(%[[PRESENT_A]] : memref<f32>) {
// CHECK-NEXT: }
-// CHECK: acc.data present([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+// CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
+// CHECK: acc.data if(%[[IFCOND1]]) dataOperands(%[[PRESENT_A]] : memref<f32>) {
// CHECK-NEXT: }
-// CHECK: acc.data copy([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+// CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
+// CHECK: %[[PRESENT_B:.*]] = acc.present varPtr(%[[ARGB]] : memref<f32>) -> memref<f32>
+// CHECK: %[[PRESENT_C:.*]] = acc.present varPtr(%[[ARGC]] : memref<f32>) -> memref<f32>
+// CHECK: acc.data dataOperands(%[[PRESENT_A]], %[[PRESENT_B]], %[[PRESENT_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: acc.data copyin([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+// CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
+// CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[ARGB]] : memref<f32>) -> memref<f32>
+// CHECK: %[[COPYIN_C:.*]] = acc.copyin varPtr(%[[ARGC]] : memref<f32>) -> memref<f32>
+// CHECK: acc.data dataOperands(%[[COPYIN_A]], %[[COPYIN_B]], %[[COPYIN_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: acc.data copyin_readonly([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+// CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[ARGA]] : memref<f32>) -> memref<f32> {dataClause = 2 : i64}
+// CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[ARGB]] : memref<f32>) -> memref<f32> {dataClause = 2 : i64}
+// CHECK: %[[COPYIN_C:.*]] = acc.copyin varPtr(%[[ARGC]] : memref<f32>) -> memref<f32> {dataClause = 2 : i64}
+// CHECK: acc.data dataOperands(%[[COPYIN_A]], %[[COPYIN_B]], %[[COPYIN_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: acc.data copyout([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+// CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[ARGA]] : memref<f32>) -> memref<f32> {dataClause = 4 : i64}
+// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) -> memref<f32> {dataClause = 4 : i64}
+// CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[ARGC]] : memref<f32>) -> memref<f32> {dataClause = 4 : i64}
+// CHECK: acc.data dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: acc.data copyout_zero([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+// CHECK: acc.copyout accPtr(%[[CREATE_A]] : memref<f32>) to varPtr(%[[ARGA]] : memref<f32>)
+// CHECK: acc.copyout accPtr(%[[CREATE_B]] : memref<f32>) to varPtr(%[[ARGB]] : memref<f32>)
+// CHECK: acc.copyout accPtr(%[[CREATE_C]] : memref<f32>) to varPtr(%[[ARGC]] : memref<f32>)
+
+// CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[ARGA]] : memref<f32>) -> memref<f32> {dataClause = 5 : i64}
+// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) -> memref<f32> {dataClause = 5 : i64}
+// CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[ARGC]] : memref<f32>) -> memref<f32> {dataClause = 5 : i64}
+// CHECK: acc.data dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: acc.data create([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+// CHECK: acc.copyout accPtr(%[[CREATE_A]] : memref<f32>) to varPtr(%[[ARGA]] : memref<f32>) {dataClause = 5 : i64}
+// CHECK: acc.copyout accPtr(%[[CREATE_B]] : memref<f32>) to varPtr(%[[ARGB]] : memref<f32>) {dataClause = 5 : i64}
+// CHECK: acc.copyout accPtr(%[[CREATE_C]] : memref<f32>) to varPtr(%[[ARGC]] : memref<f32>) {dataClause = 5 : i64}
+
+// CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
+// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) -> memref<f32>
+// CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[ARGC]] : memref<f32>) -> memref<f32>
+// CHECK: acc.data dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: acc.data create_zero([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+// CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[ARGA]] : memref<f32>) -> memref<f32> {dataClause = 8 : i64}
+// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) -> memref<f32> {dataClause = 8 : i64}
+// CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[ARGC]] : memref<f32>) -> memref<f32> {dataClause = 8 : i64}
+// CHECK: acc.data dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: acc.data no_create([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+// CHECK: %[[NOCREATE_A:.*]] = acc.nocreate varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
+// CHECK: %[[NOCREATE_B:.*]] = acc.nocreate varPtr(%[[ARGB]] : memref<f32>) -> memref<f32>
+// CHECK: %[[NOCREATE_C:.*]] = acc.nocreate varPtr(%[[ARGC]] : memref<f32>) -> memref<f32>
+// CHECK: acc.data dataOperands(%[[NOCREATE_A]], %[[NOCREATE_B]], %[[NOCREATE_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: acc.data deviceptr([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+// CHECK: %[[DEVICEPTR_A:.*]] = acc.deviceptr varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
+// CHECK: %[[DEVICEPTR_B:.*]] = acc.deviceptr varPtr(%[[ARGB]] : memref<f32>) -> memref<f32>
+// CHECK: %[[DEVICEPTR_C:.*]] = acc.deviceptr varPtr(%[[ARGC]] : memref<f32>) -> memref<f32>
+// CHECK: acc.data dataOperands(%[[DEVICEPTR_A]], %[[DEVICEPTR_B]], %[[DEVICEPTR_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: acc.data attach([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+
+// CHECK: %[[ATTACH_A:.*]] = acc.attach varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
+// CHECK: %[[ATTACH_B:.*]] = acc.attach varPtr(%[[ARGB]] : memref<f32>) -> memref<f32>
+// CHECK: %[[ATTACH_C:.*]] = acc.attach varPtr(%[[ARGC]] : memref<f32>) -> memref<f32>
+// CHECK: acc.data dataOperands(%[[ATTACH_A]], %[[ATTACH_B]], %[[ATTACH_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: acc.data copyin([[ARGB]] : memref<10xf32>) copyout([[ARGC]] : memref<10x10xf32>) present([[ARGA]] : memref<10xf32>) {
+
+
+// CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
+// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) -> memref<f32> {dataClause = 4 : i64}
+// CHECK: %[[PRESENT_C:.*]] = acc.present varPtr(%[[ARGC]] : memref<f32>) -> memref<f32>
+// CHECK: acc.data dataOperands(%[[COPYIN_A]], %[[CREATE_B]], %[[PRESENT_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: acc.data present([[ARGA]] : memref<10xf32>) {
+// CHECK: acc.copyout accPtr(%[[CREATE_B]] : memref<f32>) to varPtr(%[[ARGB]] : memref<f32>)
+
+// CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
+// CHECK: acc.data dataOperands(%[[PRESENT_A]] : memref<f32>) {
// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
-// CHECK: acc.data present([[ARGA]] : memref<10xf32>) {
+
+// CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
+// CHECK: acc.data dataOperands(%[[PRESENT_A]] : memref<f32>) {
// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue present>}
+
// CHECK: acc.data {
// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
diff --git a/mlir/test/Target/LLVMIR/openacc-llvm.mlir b/mlir/test/Target/LLVMIR/openacc-llvm.mlir
index be65894c3732d..0954d929326c2 100644
--- a/mlir/test/Target/LLVMIR/openacc-llvm.mlir
+++ b/mlir/test/Target/LLVMIR/openacc-llvm.mlir
@@ -130,58 +130,51 @@ llvm.func @testupdateop(%arg1: !llvm.ptr<f32>) {
// -----
-llvm.func @testdataop(%arg0: !llvm.struct<(ptr<f32>, ptr<f32>, i64, array<1 x i64>, array<1 x i64>)>, %arg1: !llvm.ptr<f32>, %arg2: !llvm.ptr<i32>) {
- %0 = llvm.mlir.constant(10 : index) : i64
- %1 = llvm.mlir.null : !llvm.ptr<f32>
- %2 = llvm.getelementptr %1[%0] : (!llvm.ptr<f32>, i64) -> !llvm.ptr<f32>
- %3 = llvm.ptrtoint %2 : !llvm.ptr<f32> to i64
- %4 = llvm.extractvalue %arg0[1] : !llvm.struct<(ptr<f32>, ptr<f32>, i64, array<1 x i64>, array<1 x i64>)>
- %5 = llvm.mlir.undef : !llvm.struct<"openacc_data", (struct<(ptr<f32>, ptr<f32>, i64, array<1 x i64>, array<1 x i64>)>, ptr<f32>, i64)>
- %6 = llvm.insertvalue %arg0, %5[0] : !llvm.struct<"openacc_data", (struct<(ptr<f32>, ptr<f32>, i64, array<1 x i64>, array<1 x i64>)>, ptr<f32>, i64)>
- %7 = llvm.insertvalue %4, %6[1] : !llvm.struct<"openacc_data", (struct<(ptr<f32>, ptr<f32>, i64, array<1 x i64>, array<1 x i64>)>, ptr<f32>, i64)>
- %8 = llvm.insertvalue %3, %7[2] : !llvm.struct<"openacc_data", (struct<(ptr<f32>, ptr<f32>, i64, array<1 x i64>, array<1 x i64>)>, ptr<f32>, i64)>
- acc.data copy(%8 : !llvm.struct<"openacc_data", (struct<(ptr<f32>, ptr<f32>, i64, array<1 x i64>, array<1 x i64>)>, ptr<f32>, i64)>) copyout(%arg1 : !llvm.ptr<f32>) {
+llvm.func @testdataop(%arg0: !llvm.ptr<f32>, %arg1: !llvm.ptr<f32>, %arg2: !llvm.ptr<i32>) {
+
+ %0 = acc.copyin varPtr(%arg0 : !llvm.ptr<f32>) -> !llvm.ptr<f32>
+ %1 = acc.create varPtr(%arg1 : !llvm.ptr<f32>) -> !llvm.ptr<f32>
+ acc.data dataOperands(%0, %1 : !llvm.ptr<f32>, !llvm.ptr<f32>) {
%9 = llvm.mlir.constant(2 : i32) : i32
llvm.store %9, %arg2 : !llvm.ptr<i32>
acc.terminator
}
+ acc.copyout accPtr(%0 : !llvm.ptr<f32>) to varPtr(%arg0 : !llvm.ptr<f32>)
+ acc.copyout accPtr(%1 : !llvm.ptr<f32>) to varPtr(%arg1 : !llvm.ptr<f32>)
llvm.return
}
// CHECK: %struct.ident_t = type { i32, i32, i32, i32, ptr }
-// CHECK: [[LOCSTR:@.*]] = private unnamed_addr constant [{{[0-9]*}} x i8] c";{{.*}};testdataop;{{[0-9]*}};{{[0-9]*}};;\00", align 1
-// CHECK: [[LOCGLOBAL:@.*]] = private unnamed_addr constant %struct.ident_t { i32 0, i32 2, i32 0, i32 {{[0-9]*}}, ptr [[LOCSTR]] }, align 8
-// CHECK: [[MAPNAME1:@.*]] = private unnamed_addr constant [{{[0-9]*}} x i8] c";{{.*}};unknown;{{[0-9]*}};{{[0-9]*}};;\00", align 1
-// CHECK: [[MAPNAME2:@.*]] = private unnamed_addr constant [{{[0-9]*}} x i8] c";{{.*}};unknown;{{[0-9]*}};{{[0-9]*}};;\00", align 1
-// CHECK: [[MAPTYPES:@.*]] = private unnamed_addr constant [{{[0-9]*}} x i64] [i64 8195, i64 8194]
-// CHECK: [[MAPNAMES:@.*]] = private constant [{{[0-9]*}} x ptr] [ptr [[MAPNAME1]], ptr [[MAPNAME2]]]
-
-// CHECK: define void @testdataop({ ptr, ptr, i64, [1 x i64], [1 x i64] } %{{.*}}, ptr [[SIMPLEPTR:%.*]], ptr %{{.*}})
-// CHECK: [[ARGBASE_ALLOCA:%.*]] = alloca [{{[0-9]*}} x ptr], align 8
-// CHECK: [[ARG_ALLOCA:%.*]] = alloca [{{[0-9]*}} x ptr], align 8
-// CHECK: [[SIZE_ALLOCA:%.*]] = alloca [{{[0-9]*}} x i64], align 8
-
-// CHECK: [[ARGBASE:%.*]] = extractvalue %openacc_data %{{.*}}, 0
-// CHECK: [[ARG:%.*]] = extractvalue %openacc_data %{{.*}}, 1
-// CHECK: [[ARGSIZE:%.*]] = extractvalue %openacc_data %{{.*}}, 2
-// CHECK: [[ARGBASEGEP:%.*]] = getelementptr inbounds [2 x ptr], ptr [[ARGBASE_ALLOCA]], i32 0, i32 0
-// CHECK: store { ptr, ptr, i64, [1 x i64], [1 x i64] } [[ARGBASE]], ptr [[ARGBASEGEP]], align 8
-// CHECK: [[ARGGEP:%.*]] = getelementptr inbounds [2 x ptr], ptr [[ARG_ALLOCA]], i32 0, i32 0
-// CHECK: store ptr [[ARG]], ptr [[ARGGEP]], align 8
-// CHECK: [[SIZEGEP:%.*]] = getelementptr inbounds [2 x i64], ptr [[SIZE_ALLOCA]], i32 0, i32 0
-// CHECK: store i64 [[ARGSIZE]], ptr [[SIZEGEP]], align 4
-
-// CHECK: [[ARGBASEGEP:%.*]] = getelementptr inbounds [2 x ptr], ptr [[ARGBASE_ALLOCA]], i32 0, i32 1
-// CHECK: store ptr [[SIMPLEPTR]], ptr [[ARGBASEGEP]], align 8
-// CHECK: [[ARGGEP:%.*]] = getelementptr inbounds [2 x ptr], ptr [[ARG_ALLOCA]], i32 0, i32 1
-// CHECK: store ptr [[SIMPLEPTR]], ptr [[ARGGEP]], align 8
-// CHECK: [[SIZEGEP:%.*]] = getelementptr inbounds [2 x i64], ptr [[SIZE_ALLOCA]], i32 0, i32 1
-// CHECK: store i64 ptrtoint (ptr getelementptr (ptr, ptr null, i32 1) to i64), ptr [[SIZEGEP]], align 4
-
-// CHECK: [[ARGBASE_ALLOCA_GEP:%.*]] = getelementptr inbounds [2 x ptr], ptr [[ARGBASE_ALLOCA]], i32 0, i32 0
-// CHECK: [[ARG_ALLOCA_GEP:%.*]] = getelementptr inbounds [2 x ptr], ptr [[ARG_ALLOCA]], i32 0, i32 0
-// CHECK: [[SIZE_ALLOCA_GEP:%.*]] = getelementptr inbounds [2 x i64], ptr [[SIZE_ALLOCA]], i32 0, i32 0
-// CHECK: call void @__tgt_target_data_begin_mapper(ptr [[LOCGLOBAL]], i64 -1, i32 2, ptr [[ARGBASE_ALLOCA_GEP]], ptr [[ARG_ALLOCA_GEP]], ptr [[SIZE_ALLOCA_GEP]], ptr [[MAPTYPES]], ptr [[MAPNAMES]], ptr null)
+// CHECK: @[[LOCSTR:.*]] = private unnamed_addr constant [{{[0-9]*}} x i8] c";{{.*}};testdataop;{{[0-9]*}};{{[0-9]*}};;\00"
+// CHECK: @[[LOCGLOBAL:.*]] = private unnamed_addr constant %struct.ident_t { i32 0, i32 2, i32 0, i32 {{[0-9]*}}, ptr @[[LOCSTR]] }
+// CHECK: @[[MAPNAME1:.*]] = private unnamed_addr constant [{{[0-9]*}} x i8] c";{{.*}};unknown;{{[0-9]*}};{{[0-9]*}};;\00"
+// CHECK: @[[MAPNAME2:.*]] = private unnamed_addr constant [{{[0-9]*}} x i8] c";{{.*}};unknown;{{[0-9]*}};{{[0-9]*}};;\00"
+// CHECK: @[[MAPTYPES:.*]] = private unnamed_addr constant [{{[0-9]*}} x i64] [i64 8193, i64 8192]
+// CHECK: @[[MAPNAMES:.*]] = private constant [{{[0-9]*}} x ptr] [ptr @[[MAPNAME1]], ptr @[[MAPNAME2]]]
+
+// CHECK: define void @testdataop(ptr %[[PTR0:.*]], ptr %[[PTR1:.*]], ptr %[[PTR2:.*]])
+// CHECK: %[[OFFLOAD_BASEPTRS:.*]] = alloca [{{[0-9]*}} x ptr], align 8
+// CHECK: %[[OFFLOAD_PTRS:.*]] = alloca [{{[0-9]*}} x ptr], align 8
+// CHECK: %[[OFFLOAS_SIZES:.*]] = alloca [{{[0-9]*}} x i64], align 8
+
+// CHECK: %[[OFFLOAD_BASEPTRS_GEP:.*]] = getelementptr inbounds [2 x ptr], ptr %[[OFFLOAD_BASEPTRS]], i32 0, i32 0
+// CHECK: store ptr %[[PTR0]], ptr %[[OFFLOAD_BASEPTRS_GEP]]
+// CHECK: %[[OFFLOAD_PTRS_GEP:.*]] = getelementptr inbounds [2 x ptr], ptr %[[OFFLOAD_PTRS]], i32 0, i32 0
+// CHECK: store ptr %[[PTR0]], ptr %[[OFFLOAD_PTRS_GEP]]
+// CHECK: %[[OFFLOAS_SIZES_GEP:.*]] = getelementptr inbounds [2 x i64], ptr %[[OFFLOAS_SIZES]], i32 0, i32 0
+// CHECK: store i64 ptrtoint (ptr getelementptr (ptr, ptr null, i32 1) to i64), ptr %[[OFFLOAS_SIZES_GEP]]
+
+// CHECK: %[[OFFLOAD_BASEPTRS_GEP:.*]] = getelementptr inbounds [2 x ptr], ptr %[[OFFLOAD_BASEPTRS]], i32 0, i32 1
+// CHECK: store ptr %[[PTR1]], ptr %[[OFFLOAD_BASEPTRS_GEP]]
+// CHECK: %[[OFFLOAD_PTRS_GEP:.*]] = getelementptr inbounds [2 x ptr], ptr %[[OFFLOAD_PTRS]], i32 0, i32 1
+// CHECK: store ptr %[[PTR1]], ptr %[[OFFLOAD_PTRS_GEP]]
+// CHECK: %[[OFFLOAS_SIZES_GEP:.*]] = getelementptr inbounds [2 x i64], ptr %[[OFFLOAS_SIZES]], i32 0, i32 1
+// CHECK: store i64 ptrtoint (ptr getelementptr (ptr, ptr null, i32 1) to i64), ptr %[[OFFLOAS_SIZES_GEP]]
+
+// CHECK: %[[OFFLOAD_BASEPTRS_GEP:.*]] = getelementptr inbounds [2 x ptr], ptr %[[OFFLOAD_BASEPTRS]], i32 0, i32 0
+// CHECK: %[[OFFLOAD_PTRS_GEP:.*]] = getelementptr inbounds [2 x ptr], ptr %[[OFFLOAD_PTRS]], i32 0, i32 0
+// CHECK: %[[OFFLOAS_SIZES_GEP:.*]] = getelementptr inbounds [2 x i64], ptr %[[OFFLOAS_SIZES]], i32 0, i32 0
+// CHECK: call void @__tgt_target_data_begin_mapper(ptr @[[LOCGLOBAL]], i64 -1, i32 2, ptr %[[OFFLOAD_BASEPTRS_GEP]], ptr %[[OFFLOAD_PTRS_GEP]], ptr %[[OFFLOAS_SIZES_GEP]], ptr @[[MAPTYPES]], ptr @[[MAPNAMES]], ptr null)
// CHECK: br label %acc.data
// CHECK: acc.data:
@@ -189,10 +182,10 @@ llvm.func @testdataop(%arg0: !llvm.struct<(ptr<f32>, ptr<f32>, i64, array<1 x i6
// CHECK-NEXT: br label %acc.end_data
// CHECK: acc.end_data:
-// CHECK: [[ARGBASE_ALLOCA_GEP:%.*]] = getelementptr inbounds [2 x ptr], ptr [[ARGBASE_ALLOCA]], i32 0, i32 0
-// CHECK: [[ARG_ALLOCA_GEP:%.*]] = getelementptr inbounds [2 x ptr], ptr [[ARG_ALLOCA]], i32 0, i32 0
-// CHECK: [[SIZE_ALLOCA_GEP:%.*]] = getelementptr inbounds [2 x i64], ptr [[SIZE_ALLOCA]], i32 0, i32 0
-// CHECK: call void @__tgt_target_data_end_mapper(ptr [[LOCGLOBAL]], i64 -1, i32 2, ptr [[ARGBASE_ALLOCA_GEP]], ptr [[ARG_ALLOCA_GEP]], ptr [[SIZE_ALLOCA_GEP]], ptr [[MAPTYPES]], ptr [[MAPNAMES]], ptr null)
+// CHECK: %[[OFFLOAD_BASEPTRS_GEP:.*]] = getelementptr inbounds [2 x ptr], ptr %[[OFFLOAD_BASEPTRS]], i32 0, i32 0
+// CHECK: %[[OFFLOAD_PTRS_GEP:.*]] = getelementptr inbounds [2 x ptr], ptr %[[OFFLOAD_PTRS]], i32 0, i32 0
+// CHECK: %[[OFFLOAS_SIZES_GEP:.*]] = getelementptr inbounds [2 x i64], ptr %[[OFFLOAS_SIZES]], i32 0, i32 0
+// CHECK: call void @__tgt_target_data_end_mapper(ptr @[[LOCGLOBAL]], i64 -1, i32 2, ptr %[[OFFLOAD_BASEPTRS_GEP]], ptr %[[OFFLOAD_PTRS_GEP]], ptr %[[OFFLOAS_SIZES_GEP]], ptr @[[MAPTYPES]], ptr @[[MAPNAMES]], ptr null)
// CHECK: declare void @__tgt_target_data_begin_mapper(ptr, i64, i32, ptr, ptr, ptr, ptr, ptr, ptr)
// CHECK: declare void @__tgt_target_data_end_mapper(ptr, i64, i32, ptr, ptr, ptr, ptr, ptr, ptr)
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