[flang-commits] [flang] [flang] update ppc-vec-store-elem-order.f90 after #74709 (NFC) (PR #75064)

via flang-commits flang-commits at lists.llvm.org
Mon Dec 11 08:14:36 PST 2023


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-flang-fir-hlfir

Author: None (kkwli)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/75064.diff


1 Files Affected:

- (modified) flang/test/Lower/PowerPC/ppc-vec-store-elem-order.f90 (+8-8) 


``````````diff
diff --git a/flang/test/Lower/PowerPC/ppc-vec-store-elem-order.f90 b/flang/test/Lower/PowerPC/ppc-vec-store-elem-order.f90
index 494ed21f4fe928..caf6d5463a8336 100644
--- a/flang/test/Lower/PowerPC/ppc-vec-store-elem-order.f90
+++ b/flang/test/Lower/PowerPC/ppc-vec-store-elem-order.f90
@@ -67,10 +67,10 @@ subroutine vec_xstd2_test(arg1, arg2, arg3, i)
 
 ! LLVMIR: %[[i:.*]] = load i32, ptr %3, align 4
 ! LLVMIR: %[[iext:.*]] = sext i32 %[[i]] to i64
-! LLVMIR: %[[isub:.*]] = sub i64 %[[iext]], 1
-! LLVMIR: %[[imul1:.*]] = mul i64 %[[isub]], 1
-! LLVMIR: %[[imul2:.*]] = mul i64 %[[imul1]], 1
-! LLVMIR: %[[iadd:.*]] = add i64 %[[imul2]], 0
+! LLVMIR: %[[isub:.*]] = sub nsw i64 %[[iext]], 1
+! LLVMIR: %[[imul1:.*]] = mul nsw i64 %[[isub]], 1
+! LLVMIR: %[[imul2:.*]] = mul nsw i64 %[[imul1]], 1
+! LLVMIR: %[[iadd:.*]] = add nsw i64 %[[imul2]], 0
 ! LLVMIR: %[[gep1:.*]] = getelementptr <4 x float>, ptr %2, i64 %[[iadd]]
 ! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %0, align 16
 ! LLVMIR: %[[arg2:.*]] = load i16, ptr %1, align 2
@@ -93,10 +93,10 @@ subroutine vec_xstw4_test(arg1, arg2, arg3, i)
 
 ! LLVMIR: %[[i:.*]] = load i32, ptr %3, align 4
 ! LLVMIR: %[[iext:.*]] = sext i32 %[[i]] to i64
-! LLVMIR: %[[isub:.*]] = sub i64 %[[iext]], 1
-! LLVMIR: %[[imul1:.*]] = mul i64 %[[isub]], 1
-! LLVMIR: %[[imul2:.*]] = mul i64 %[[imul1]], 1
-! LLVMIR: %[[iadd:.*]] = add i64 %[[imul2]], 0
+! LLVMIR: %[[isub:.*]] = sub nsw i64 %[[iext]], 1
+! LLVMIR: %[[imul1:.*]] = mul nsw i64 %[[isub]], 1
+! LLVMIR: %[[imul2:.*]] = mul nsw i64 %[[imul1]], 1
+! LLVMIR: %[[iadd:.*]] = add nsw i64 %[[imul2]], 0
 ! LLVMIR: %[[gep1:.*]] = getelementptr <4 x float>, ptr %2, i64 %[[iadd]]
 ! LLVMIR: %[[arg1:.*]] = load <4 x float>, ptr %0, align 16
 ! LLVMIR: %[[arg2:.*]] = load i16, ptr %1, align 2

``````````

</details>


https://github.com/llvm/llvm-project/pull/75064


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