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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> Keane, Erich <erich.keane@intel.com><br>
<b>Sent:</b> Friday, May 15, 2020 9:06 AM<br>
<b>To:</b> Finkel, Hal J. <hfinkel@anl.gov>; Craig Topper <craig.topper@gmail.com>; Simon Moll <Simon.Moll@EMEA.NEC.COM><br>
<b>Cc:</b> MARUKAWA KAZUSHI <marukawa@nec.com>; Clang Dev <cfe-dev@lists.llvm.org>; ISHIZAKA KAZUHISA <ishizaka@nec.com>; Erich Focht <Erich.Focht@EMEA.NEC.COM><br>
<b>Subject:</b> RE: [cfe-dev] [RFC] Opt-in vector of bool type</font>
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That is an option, its just different from the rest of the vector types so it is a decision we should make intentionally. I’d also expect said patch/RFC to define what this means in the case of all of the operations. For example:</p>
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Bool1 + Bool2 (I’m told) has a different meaning in the case of vector hardware than normal bools. I’d expect those to be clarified.</p>
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This isn’t as simple as reverting Aaron’s patch, there is some thought that needs to go into how that works in the case of the variety of operators.</p>
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I definitely agree that these should have well-defined/documented semantics.</p>
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-Hal</p>
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<b>From:</b> Finkel, Hal J. <hfinkel@anl.gov> <br>
<b>Sent:</b> Friday, May 15, 2020 7:02 AM<br>
<b>To:</b> Keane, Erich <erich.keane@intel.com>; Craig Topper <craig.topper@gmail.com>; Simon Moll <Simon.Moll@EMEA.NEC.COM><br>
<b>Cc:</b> MARUKAWA KAZUSHI <marukawa@nec.com>; Clang Dev <cfe-dev@lists.llvm.org>; ISHIZAKA KAZUHISA <ishizaka@nec.com>; Erich Focht <Erich.Focht@EMEA.NEC.COM><br>
<b>Subject:</b> Re: [cfe-dev] [RFC] Opt-in vector of bool type</p>
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<b><span style="color:black">From:</span></b><span style="color:black"> cfe-dev <<a href="mailto:cfe-dev-bounces@lists.llvm.org">cfe-dev-bounces@lists.llvm.org</a>> on behalf of Simon Moll via cfe-dev <<a href="mailto:cfe-dev@lists.llvm.org">cfe-dev@lists.llvm.org</a>><br>
<b>Sent:</b> Friday, May 15, 2020 8:31 AM<br>
<b>To:</b> Keane, Erich <<a href="mailto:erich.keane@intel.com">erich.keane@intel.com</a>>; Craig Topper <<a href="mailto:craig.topper@gmail.com">craig.topper@gmail.com</a>><br>
<b>Cc:</b> MARUKAWA KAZUSHI <<a href="mailto:marukawa@nec.com">marukawa@nec.com</a>>; Clang Dev <<a href="mailto:cfe-dev@lists.llvm.org">cfe-dev@lists.llvm.org</a>>; ISHIZAKA KAZUHISA <<a href="mailto:ishizaka@nec.com">ishizaka@nec.com</a>>; Erich Focht <<a href="mailto:Erich.Focht@EMEA.NEC.COM">Erich.Focht@EMEA.NEC.COM</a>><br>
<b>Subject:</b> Re: [cfe-dev] [RFC] Opt-in vector of bool type</span><span style="color:#666666">
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<span style="color:#666666">On 5/15/20 3:18 PM, Keane, Erich wrote:</span></p>
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<span style="color:#666666">> The way i see it you are open to supporting this feature in Clang but there are LLVM bugs for <N x i1> types, which we may hit more often as a result, and then there is this unrelated Clang lvalue bug for attribute((vector_size)).</span></p>
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<span style="color:#666666">I don’t take this as a proper summary of my position. I was warning you about the issues in LLVM, however the biggest issue is the fact that a vector of i1s isn’t individually addressable. Unless you have a way to produce an address
for each individual element (which we don’t, and is why std::vector<bool> uses a proxy return type), I don’t think this fits in the type system.</span></p>
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<span style="color:#666666">Ok, thanks for clarifying your position. If this is a concern, couldn't we just introduce a new attribute, similar to 'vector_size' or 'ext_vector_type' that simply does not allow element addressing, ie its values are more or less
opaque and will only be consumed and produced as a whole (eg by intrinsics)? This would be good enough for SIMD builtins since those will only assemble and take masks apart outside of C/C++ language semantics.</span></p>
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Why would we not treat these like bit fields?</p>
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I think that we should support this. I've worked with several architectures that have native vector predicate registers and it seems reasonable to support these directly.</p>
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-Hal</p>
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<b><span style="color:#666666">From:</span></b><span style="color:#666666"> Simon Moll
<a href="mailto:Simon.Moll@EMEA.NEC.COM"><Simon.Moll@EMEA.NEC.COM></a> <br>
<b>Sent:</b> Friday, May 15, 2020 6:14 AM<br>
<b>To:</b> Keane, Erich <a href="mailto:erich.keane@intel.com"><erich.keane@intel.com></a>; Craig Topper
<a href="mailto:craig.topper@gmail.com"><craig.topper@gmail.com></a><br>
<b>Cc:</b> Clang Dev <a href="mailto:cfe-dev@lists.llvm.org"><cfe-dev@lists.llvm.org></a>; MARUKAWA KAZUSHI
<a href="mailto:marukawa@nec.com"><marukawa@nec.com></a>; ISHIZAKA KAZUHISA <a href="mailto:ishizaka@nec.com">
<ishizaka@nec.com></a>; Erich Focht <a href="mailto:Erich.Focht@EMEA.NEC.COM"><Erich.Focht@EMEA.NEC.COM></a><br>
<b>Subject:</b> Re: [cfe-dev] [RFC] Opt-in vector of bool type</span></p>
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<span style="color:#666666">That's interesting, i wasn't aware of those bug reports.<br>
<br>
The way i see it you are open to supporting this feature in Clang but there are LLVM bugs for <N x i1> types, which we may hit more often as a result, and then there is this unrelated Clang lvalue bug for attribute((vector_size)).<br>
<br>
We will use the bool vector feature exclusively in our intrinsic headers to declare bool vectors that cleanly map to our ISA, so in a very controlled way. Of course, once the bool vector feature for Clang is out there people will use it with a certain expectation.
Then again, it is already possible to generate arbitrary <N x i1> types in LLVM today, just not using Clang.<br>
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- Simon<br>
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<br>
On 5/14/20 6:33 PM, Keane, Erich wrote:</span></p>
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<span style="color:#666666">Ah, the result of operator[] should be an LValue, so it should be addressable. Unfortunately, I don’t think we currently implement that correctly (and consider that a bug). See:</span></p>
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<span style="color:#666666"><a href="https://godbolt.org/z/Coo8Ai">https://godbolt.org/z/Coo8Ai</a></span></p>
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<span style="color:#666666">Note we don’t allow taking a non-const ref or address of a vector element, but GCC does, though presumably that is something we should fix.</span></p>
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<b><span style="color:#666666">From:</span></b><span style="color:#666666"> Craig Topper
<a href="mailto:craig.topper@gmail.com"><craig.topper@gmail.com></a> <br>
<b>Sent:</b> Thursday, May 14, 2020 9:17 AM<br>
<b>To:</b> Keane, Erich <a href="mailto:erich.keane@intel.com"><erich.keane@intel.com></a><br>
<b>Cc:</b> Simon Moll <a href="mailto:Simon.Moll@emea.nec.com"><Simon.Moll@emea.nec.com></a>; Clang Dev
<a href="mailto:cfe-dev@lists.llvm.org"><cfe-dev@lists.llvm.org></a>; MARUKAWA KAZUSHI
<a href="mailto:marukawa@nec.com"><marukawa@nec.com></a>; ISHIZAKA KAZUHISA <a href="mailto:ishizaka@nec.com">
<ishizaka@nec.com></a>; Erich Focht <a href="mailto:Erich.Focht@emea.nec.com"><Erich.Focht@emea.nec.com></a><br>
<b>Subject:</b> Re: [cfe-dev] [RFC] Opt-in vector of bool type</span></p>
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<span style="color:#666666">The main issue were various issues in SelectionDAG with loads/store of vectors that aren't byte sized. For example PR42803 and PR44902.</span></p>
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<span style="color:#666666">The extended vector types also support operator[] which probably assumes the elements are individually addressable?</span></p>
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<span style="color:#666666">~Craig</span></p>
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<span style="color:#666666">On Thu, May 14, 2020 at 7:41 AM Keane, Erich via cfe-dev <<a href="mailto:cfe-dev@lists.llvm.org" target="_blank">cfe-dev@lists.llvm.org</a>> wrote:</span></p>
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<span style="color:#666666">Craig Topper is the one who will know better, he should be along in a few hours.<br>
<br>
-----Original Message-----<br>
From: Simon Moll <<a href="mailto:Simon.Moll@EMEA.NEC.COM" target="_blank">Simon.Moll@EMEA.NEC.COM</a>>
<br>
Sent: Thursday, May 14, 2020 7:36 AM<br>
To: Keane, Erich <<a href="mailto:erich.keane@intel.com" target="_blank">erich.keane@intel.com</a>>; Clang Dev <<a href="mailto:cfe-dev@lists.llvm.org" target="_blank">cfe-dev@lists.llvm.org</a>><br>
Cc: MARUKAWA KAZUSHI <<a href="mailto:marukawa@nec.com" target="_blank">marukawa@nec.com</a>>; ISHIZAKA KAZUHISA <<a href="mailto:ishizaka@nec.com" target="_blank">ishizaka@nec.com</a>>; Erich Focht <<a href="mailto:Erich.Focht@EMEA.NEC.COM" target="_blank">Erich.Focht@EMEA.NEC.COM</a>><br>
Subject: Re: [RFC] Opt-in vector of bool type<br>
<br>
On 5/14/20 4:14 PM, Keane, Erich wrote:<br>
>> Ok, we specifically want to lower it to <N x i1>.. what could go wrong?<br>
> I'm having trouble recalling the specifics, but we tried it on SYCL (a downstream) and had a ton of problems to the point we removed it. There isn't a good way to handle it from the ABI perspective, there is no good memory representation as a result, and
many of the passes were not handling it correctly. It makes it a huge undertaking.<br>
That's actually a point in favor of making it opt out.<br>
We do use <256 x i1> and <512 x i1> in our LLVM fork for SX-Aurora and it is working fine for us. I guess that there could be issues with 'i1'<br>
being smaller than the smallest addressable unit so things like <3 x i1> could be problematic. I wonder, shouldn't _ExtInt have the exact same problem?<br>
<br>
> -----Original Message-----<br>
> From: Simon Moll <<a href="mailto:Simon.Moll@EMEA.NEC.COM" target="_blank">Simon.Moll@EMEA.NEC.COM</a>><br>
> Sent: Thursday, May 14, 2020 7:09 AM<br>
> To: Keane, Erich <<a href="mailto:erich.keane@intel.com" target="_blank">erich.keane@intel.com</a>>; Clang Dev
<br>
> <<a href="mailto:cfe-dev@lists.llvm.org" target="_blank">cfe-dev@lists.llvm.org</a>><br>
> Cc: MARUKAWA KAZUSHI <<a href="mailto:marukawa@nec.com" target="_blank">marukawa@nec.com</a>>; ISHIZAKA KAZUHISA
<br>
> <<a href="mailto:ishizaka@nec.com" target="_blank">ishizaka@nec.com</a>>; Erich Focht <<a href="mailto:Erich.Focht@EMEA.NEC.COM" target="_blank">Erich.Focht@EMEA.NEC.COM</a>><br>
> Subject: Re: [RFC] Opt-in vector of bool type<br>
><br>
> On 5/14/20 3:57 PM, Keane, Erich wrote:<br>
>> There is a temptation when doing this to try to represent these as a vector of i1 in IR. Don't do this, it still has to be i8s, otherwise it causes a number of problems. <br>
> Ok, we specifically want to lower it to <N x i1>.. what could go wrong?<br>
>> I'll leave it to the rest of the mailing list to judge whether the GCC incompatibility is justified. However, I'm curious as to why this would be opt-in on a target basis? Are there some targets that wouldn't be able to legalize this?<br>
> I'd say that some targets may value strict gcc compliance higher than supporting this type (ie if they have no use for it). Making it an opt-in simply means less disturbance. In any case, it's again completely in line with the wording of the gcc documentation
to scalarize the type for targets that do not support it.<br>
>> -----Original Message-----<br>
>> From: cfe-dev <<a href="mailto:cfe-dev-bounces@lists.llvm.org" target="_blank">cfe-dev-bounces@lists.llvm.org</a>> On Behalf Of Simon
<br>
>> Moll via cfe-dev<br>
>> Sent: Thursday, May 14, 2020 6:39 AM<br>
>> To: <a href="mailto:cfe-dev@lists.llvm.org" target="_blank">cfe-dev@lists.llvm.org</a><br>
>> Cc: MARUKAWA KAZUSHI <<a href="mailto:marukawa@nec.com" target="_blank">marukawa@nec.com</a>>; ISHIZAKA KAZUHISA
<br>
>> <<a href="mailto:ishizaka@nec.com" target="_blank">ishizaka@nec.com</a>>; Erich Focht <<a href="mailto:Erich.Focht@EMEA.NEC.COM" target="_blank">Erich.Focht@EMEA.NEC.COM</a>><br>
>> Subject: [cfe-dev] [RFC] Opt-in vector of bool type<br>
>><br>
>> Hi,<br>
>><br>
>> We would like to extend Clang to allow 'bool' as a valid vector element type in C/C++ code for select targets.<br>
>><br>
>> This is the natural type for SIMD masks and would facilitate clean SIMD intrinsic declarations in C/C++ code.<br>
>> Vectors of i1 are supported on IR level and below down to many SIMD ISAs, such as AVX512 or the VE target (NEC SX-Aurora TSUBASA).<br>
>> We understand the historical reasons for not supporting this (gcc complicance).<br>
>> However, this would be an opt-in feature and toolchains/targets that do not want this will be unaffected by the change.<br>
>><br>
>> Looking forward to your feedback.<br>
>><br>
>> - Simon<br>
>> _______________________________________________<br>
>> cfe-dev mailing list<br>
>> <a href="mailto:cfe-dev@lists.llvm.org" target="_blank">cfe-dev@lists.llvm.org</a><br>
>> <a href="https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-dev" target="_blank">
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-dev</a><br>
>><br>
><br>
><br>
><br>
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