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Assume for brevity that</div>
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vector_int = __attribute__((__vector_size__(32 * sizeof(int)))) int<br>
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<div>vector_bool = __attribute__((__vector_size__(128 * sizeof(_Bool)))) _Bool<br>
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<div>Consider this AST. It contains bitcasts from vector_bool to vector_int and the other way around.</div>
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<div style="margin: 0px">| `-ImplicitCastExpr 0x807c212b0 <col:10, col:51> 'HVX_Vector':'vector_int' <BitCast><br>
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<div style="margin: 0px">| `-CallExpr 0x807c21220 <col:10, col:51> 'vector_bool'<br>
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<div style="margin: 0px">| |-ImplicitCastExpr 0x807c21208 <col:10> 'vector_bool (*)(vector_bool, vector_bool)' <BuiltinFnToFnPtr><br>
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<div style="margin: 0px">| | `-DeclRefExpr 0x807c21180 <col:10> '<builtin fn type>' Function 0x807c21000 '__builtin_HEXAGON_V6_pred_and_128B' 'vector_bool (vector_bool, vector_bool)'<br>
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<div style="margin: 0px">| |-ImplicitCastExpr 0x807c21268 <col:45> 'vector_bool' <BitCast><br>
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<div style="margin: 0px">| | `-ImplicitCastExpr 0x807c21250 <col:45> 'HVX_Vector':'vector_int' <LValueToRValue><br>
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<div style="margin: 0px">| | `-DeclRefExpr 0x807c211a0 <col:45> 'HVX_Vector':'vector_int' lvalue ParmVar 0x807a43d10 'a0' 'HVX_Vector':'vector_int'<br>
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<div style="margin: 0px">| `-ImplicitCastExpr 0x807c21298 <col:49> 'vector_bool' <BitCast><br>
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<div style="margin: 0px">| `-ImplicitCastExpr 0x807c21280 <col:49> 'HVX_Vector':'vector_int' <LValueToRValue><br>
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<div style="margin: 0px">| `-DeclRefExpr 0x807c211c0 <col:49> 'HVX_Vector':'vector_int' lvalue ParmVar 0x807a43d88 'a1' 'HVX_Vector':'vector_int'<br>
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<ol>
<li>These casts are not no-ops, there are instructions that do it (with corresponding builtins/intrinsics). In the actual hardware, the registers holding vector_int are 1024 bits long, the registers holding vector_bool are 128 bits long.</li><li>The "bool" vectors are not storable directly (i.e. no way to store the 128 bits to memory). Instead, they have to be "expanded" into vector_int (or contracted from vector_int). In other words, vector_int is the universal storage format for both types.<br>
</li></ol>
<div>Long story short, in C code we want to make these two types look (more or less) the same (i.e. both are 128 bytes), but in LLVM IR they are different (since 32*i32 is not bitcastable to 128*i1). Now, I want to replace these bitcasts with calls to proper
builtins, i.e. transform clang's Expr to another Expr. Right now we deal with it in CGBuiltin as a part of codegen, but it's not elegant (not composable with other per-builtin handling that may need to happen in CGBuiltin).</div>
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<div>-Krzysztof</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> Eli Friedman <efriedma@quicinc.com><br>
<b>Sent:</b> Monday, March 9, 2020 4:42 PM<br>
<b>To:</b> Krzysztof Parzyszek <kparzysz@quicinc.com><br>
<b>Cc:</b> cfe-dev@lists.llvm.org <cfe-dev@lists.llvm.org><br>
<b>Subject:</b> RE: [EXT] [cfe-dev] Target-specific AST rewriting (clang)</font>
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<div class="PlainText">I'm not sure I follow what you mean. Do you mean that given, for example "float x; __builtin_foo(-x);", you call "llvm.foo(-x)", and given "double x; __builtin_foo((float)-x)", you call "llvm.bar(-x)"? I don't think there's any precedent
for that, no; normally that's the sort of optimization you'd handle in instcombine.<br>
<br>
-Eli<br>
<br>
> -----Original Message-----<br>
> From: cfe-dev <cfe-dev-bounces@lists.llvm.org> On Behalf Of Krzysztof<br>
> Parzyszek via cfe-dev<br>
> Sent: Monday, March 9, 2020 12:57 PM<br>
> To: cfe-dev@lists.llvm.org<br>
> Subject: [EXT] [cfe-dev] Target-specific AST rewriting (clang)<br>
> <br>
> Hi,<br>
> <br>
> There are some type casts that should be replaced with intrinsics (this is<br>
> Hexagon-specific). Those only occur in calls to Hexagon builtins, and right now<br>
> this replacement happens as a part of clang's codegen.<br>
> However, this replacement is only triggered by types in the AST and the<br>
> corresponding types in the LLVM IR, and is not dependent on the details<br>
> (semantics) of any particular builtin, so I'd like to make it orthogonal to the<br>
> cgbuiltin code that deals with specific intrinsics. I'd like the replacement to<br>
> transform AST->AST, so the result can be easily composed with any code that<br>
> does AST->LLVM IR.<br>
> <br>
> Is there a precedent for something like this? I could do this right at the<br>
> beginning of EmitHexagonBuiltinExpr, but I was wondering if there was a better<br>
> way.<br>
> <br>
> --<br>
> Krzysztof Parzyszek kparzysz@quicinc.com AI tools development<br>
> <br>
> _______________________________________________<br>
> cfe-dev mailing list<br>
> cfe-dev@lists.llvm.org<br>
> <a href="https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-dev">https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-dev</a><br>
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