<div dir="auto"><div>Hi Alexey, thank you for starting this discussion, and for offering to contribute this extension!</div><div dir="auto"><br></div><div dir="auto">Our policy for accepting language extensions is documented here:</div><div dir="auto"><br></div><div dir="auto"><a href="http://clang.llvm.org/get_involved.html" target="_blank" rel="noreferrer">http://clang.llvm.org/get_involved.html</a></div><div dir="auto"><br></div><div dir="auto">... and, on the assumption that you / Intel will be providing long-term support and maintenance for SYCL in Clang, I'm satisfied that all of those points are met. (+rjmccall in case he has concerns in this area.)</div><div dir="auto"><br></div><div dir="auto">Since there seems to be a lot of overlap between SYCL and OpenCL, you should come to an agreement with Anastasia about code ownership and how the two features will harmoniously coexist, and I'm happy to see that that discussion has already begun.</div><div dir="auto"><br></div><div dir="auto">Best wishes,</div><div dir="auto">Richard<br><br><div class="gmail_quote" dir="auto"><div dir="ltr" class="gmail_attr">On Fri, 11 Jan 2019, 10:02 Bader, Alexey via cfe-dev, <<a href="mailto:cfe-dev@lists.llvm.org" target="_blank" rel="noreferrer">cfe-dev@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div lang="EN-US" link="#0563C1" vlink="#954F72">
<div class="m_-4200657757634293029m_6021489705144966559WordSection1">
<p style="margin:0cm;margin-bottom:.0001pt"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">TLDR</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">We (Intel) would like to request to add SYCL programming model support to LLVM/Clang project to facilitate collaboration on C++ single-source
heterogeneous programming for accelerators like GPU, FPGA, DSP, etc. from different hardware and software vendors. SYCL programming model is described in detail in the specification document available at the Khronos site:
<a href="https://www.khronos.org/registry/SYCL/specs/sycl-1.2.1.pdf" rel="noreferrer noreferrer" target="_blank">https://www.khronos.org/registry/SYCL/specs/sycl-1.2.1.pdf</a>.
<u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> <u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">Getting started</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">I'm going to start sending patches to the clang project with the basic functionalities (including a new command line option to enable SYCL
programming model) and RFCs for features requiring design review with clang community (e.g. the interface or protocol between the device compiler and the runtime library).<u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">I'm looking for suggestions on what is the best way to proceed with this proposal. I would appreciate any feedback.<u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> <u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">Features</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">Here is short list of features we would like to contribute first:<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:27.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:Symbol;color:black"><span>·<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">SYCL compiler<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span>o<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">Adding device compiler diagnostics (this should almost 100% overlap with OpenCL C++ compiler diagnostics)<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span>o<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">Functionality to separate SYCL device code out from the single source<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span>o<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">Address-space handling (including address space inference/deduction)<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span>o<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">Functionality to translate SYCL device code (C++) to SPIR-V format<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span>o<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">Adding two attributes to mark SYCL kernel functions (can be invoked from the host) and SYCL device functions (available on the device)<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span>o<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">Functionality to emit the "integration header" by SYCL device compiler with the device specific information for SYCL runtime library, which is used to launch SYCL kernels on the OpenCL device.<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span>o<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">SYCL compiler driver<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:81.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:Symbol;color:black"><span>·<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">Implementation of two compilation modes: device-only and two-step compilation<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:81.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:Symbol;color:black"><span>·<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">Functionality to support device code compilation and linking from multiple translation units<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:81.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:Symbol;color:black"><span>·<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">Enhancing the driver with clang-offload-wrapper tool and corresponding job to support "fat objects" (the device code and the host code bundled together).<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:81.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:Symbol;color:black"><span>·<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">Adding SYCL toolchain support including llvm-spirv and offload-wrapper tools.<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:27.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:Symbol;color:black"><span>·<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">Contributing SYCL runtime library under LLVM projects.<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span>o<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">SYCL C++ Template Library: the template library provides a set of C++ templates and classes which provide the programming model to the user. It enables the creation of runtime classes such as SYCL queues,
buffers and images, as well as access to some underlying OpenCL runtime object, such as contexts, platforms, devices and program objects.<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span>o<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">SYCL runtime: The SYCL runtime interfaces with the underlying OpenCL implementations and handles scheduling of commands in queues, moving of data between host and devices, manages contexts, programs,
kernel compilation and memory management.<u></u><u></u></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;vertical-align:middle">
<u></u><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span>o<span style="font:7.0pt "Times New Roman"">
</span></span></span><u></u><span style="color:black">The SYCL system assumes the existence of one or more OpenCL implementations available on the host machine. If no OpenCL implementation is available, then the SYCL implementation provides only the SYCL
host device to run kernels on.<u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> <u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">Almost all compiler modifications are supposed to be made in the clang project and SYCL runtime library (located in "<root>/sycl" directory).
The only change planned in LLVM project so far is new environment component in the triple.<u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> <u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">What is SYCL</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">(from
<a href="https://www.khronos.org/sycl/" rel="noreferrer noreferrer" target="_blank">https://www.khronos.org/sycl/</a>)<u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">SYCL (pronounced ‘sickle’) is a royalty-free, cross-platform abstraction layer that builds on the underlying concepts, portability and efficiency
of OpenCL that enables code for heterogeneous processors to be written in a “single-source” style using completely standard C++ language. SYCL single-source programming enables the host and kernel code for an application to be contained in the same source
file, in a type-safe way and with the simplicity of a cross-platform asynchronous task graph. SYCL includes templates and generic lambda functions to enable higher-level application software to be cleanly coded with optimized acceleration of kernel code across
the extensive range of shipping OpenCL implementations. <u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> <u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">High level overview of Intel's SYCL implementation</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">Intel's SYCL implementation consists of two major components: SYCL compiler and runtime library. Although SYCL is designed as "extension-free"
standard C++ API, there is a need to have some "compiler" extensions to enable C++ code execution on accelerators (e.g. special attributes to mark "accelerated" functions).<u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">SYCL compiler is responsible for "extracting" device part of code and compiling it to SPIR-V format or device native binary.
<a href="https://www.khronos.org/spir/" rel="noreferrer noreferrer" target="_blank">SPIR-V</a> (Standard Portable Intermediate Representation) is a standard form of the code for OpenCL<sup>TM</sup> offload API. In addition, the compiler also emits auxiliary information, which is used by the SYCL runtime
to run the device code on the accelerator via OpenCL<sup>TM</sup> API.<u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">SYCL runtime library API is a C++ abstraction layer on top of the OpenCL<sup>TM</sup> API which enables execution of C++ SYCL code on accelerators
like FPGA or GPU. <u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> <u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">We are working on making Intel's implementation sources available at GitHub (hopefully next week). Our implementation is not complete, but
we would like to start collaboration with the community interested in heterogeneous programming as early as possible to improve the quality of the implementation through design and code review process.<u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> <u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">Available SYCL resources</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><a href="https://www.khronos.org/sycl/" rel="noreferrer noreferrer" target="_blank">https://www.khronos.org/sycl/</a> - SYCL page at Khronos Group site.<u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><a href="http://sycl.tech/" rel="noreferrer noreferrer" target="_blank">http://sycl.tech/</a> - SYCL ecosystem site (supported by Codeplay). There is a list of project implemented using
SYCL programming model (e.g. Tensorflow SYCL back-end, machine learning and linear algebra libraries, etc.)
<u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><a href="https://github.com/KhronosGroup/SyclParallelSTL" rel="noreferrer noreferrer" target="_blank">https://github.com/KhronosGroup/SyclParallelSTL</a> - Parallel STL implementation
based on SYCL<u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><a href="https://github.com/triSYCL/triSYCL" rel="noreferrer noreferrer" target="_blank">https://github.com/triSYCL/triSYCL</a> - open source SYCL implementation driven by Xilinx<u></u><u></u></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><a href="https://www.codeplay.com/products/computesuite/computecpp" rel="noreferrer noreferrer" target="_blank">https://www.codeplay.com/products/computesuite/computecpp</a> - closed
source SYCL implementation from Codeplay<u></u><u></u></span></p>
<p class="MsoNormal"><u></u> <u></u></p>
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