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<p class="MsoNormal"><span style="color:#1F497D">Hi,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D">A short update: we uploaded SYCL compiler and runtime sources to the GitHub
<a href="https://github.com/intel/llvm/tree/sycl">https://github.com/intel/llvm/tree/sycl</a>.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D">Thanks to all who provided feedback and expressed interest in this project (mostly off the clang mailing list).<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D">If there are no objections, we are going to start sending patches for review in a week or two.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D">- Alexey<o:p></o:p></span></p>
<p class="MsoNormal"><a name="_MailEndCompose"><o:p> </o:p></a></p>
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<p class="MsoNormal"><a name="_____replyseparator"></a><b>From:</b> Bader, Alexey
<br>
<b>Sent:</b> Friday, January 11, 2019 10:02 AM<br>
<b>To:</b> cfe-dev (cfe-dev@lists.llvm.org) <cfe-dev@lists.llvm.org><br>
<b>Subject:</b> [RFC] Add SYCL programming model support.<o:p></o:p></p>
</div>
</div>
<p class="MsoNormal"><o:p> </o:p></p>
<p style="margin:0cm;margin-bottom:.0001pt"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">TLDR</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">We (Intel) would like to request to add SYCL programming model support to LLVM/Clang project to facilitate collaboration on C++ single-source
heterogeneous programming for accelerators like GPU, FPGA, DSP, etc. from different hardware and software vendors. SYCL programming model is described in detail in the specification document available at the Khronos site:
<a href="https://www.khronos.org/registry/SYCL/specs/sycl-1.2.1.pdf">https://www.khronos.org/registry/SYCL/specs/sycl-1.2.1.pdf</a>.
<o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> <o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">Getting started</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">I'm going to start sending patches to the clang project with the basic functionalities (including a new command line option to enable SYCL
programming model) and RFCs for features requiring design review with clang community (e.g. the interface or protocol between the device compiler and the runtime library).<o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">I'm looking for suggestions on what is the best way to proceed with this proposal. I would appreciate any feedback.<o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> <o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">Features</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">Here is short list of features we would like to contribute first:<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:27.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:Symbol;color:black"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">SYCL compiler<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l0 level2 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span style="mso-list:Ignore">o<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">Adding device compiler diagnostics (this should almost 100% overlap with OpenCL C++ compiler diagnostics)<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l0 level2 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span style="mso-list:Ignore">o<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">Functionality to separate SYCL device code out from the single source<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l0 level2 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span style="mso-list:Ignore">o<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">Address-space handling (including address space inference/deduction)<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l0 level2 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span style="mso-list:Ignore">o<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">Functionality to translate SYCL device code (C++) to SPIR-V format<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l0 level2 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span style="mso-list:Ignore">o<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">Adding two attributes to mark SYCL kernel functions (can be invoked from the host) and SYCL device functions (available on the device)<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l0 level2 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span style="mso-list:Ignore">o<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">Functionality to emit the "integration header" by SYCL device compiler with the device specific information for SYCL runtime library, which is used to launch SYCL kernels on the OpenCL device.<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l0 level2 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span style="mso-list:Ignore">o<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">SYCL compiler driver<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:81.0pt;text-indent:-18.0pt;mso-list:l0 level3 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:Symbol;color:black"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">Implementation of two compilation modes: device-only and two-step compilation<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:81.0pt;text-indent:-18.0pt;mso-list:l0 level3 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:Symbol;color:black"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">Functionality to support device code compilation and linking from multiple translation units<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:81.0pt;text-indent:-18.0pt;mso-list:l0 level3 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:Symbol;color:black"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">Enhancing the driver with clang-offload-wrapper tool and corresponding job to support "fat objects" (the device code and the host code bundled together).<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:81.0pt;text-indent:-18.0pt;mso-list:l0 level3 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:Symbol;color:black"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">Adding SYCL toolchain support including llvm-spirv and offload-wrapper tools.<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:27.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:Symbol;color:black"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">Contributing SYCL runtime library under LLVM projects.<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l0 level2 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span style="mso-list:Ignore">o<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">SYCL C++ Template Library: the template library provides a set of C++ templates and classes which provide the programming model to the user. It enables the creation of runtime classes such as SYCL queues,
buffers and images, as well as access to some underlying OpenCL runtime object, such as contexts, platforms, devices and program objects.<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l0 level2 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span style="mso-list:Ignore">o<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">SYCL runtime: The SYCL runtime interfaces with the underlying OpenCL implementations and handles scheduling of commands in queues, moving of data between host and devices, manages contexts, programs,
kernel compilation and memory management.<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:54.0pt;text-indent:-18.0pt;mso-list:l0 level2 lfo2;vertical-align:middle">
<![if !supportLists]><span style="font-size:10.0pt;font-family:"Courier New";color:black"><span style="mso-list:Ignore">o<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span style="color:black">The SYCL system assumes the existence of one or more OpenCL implementations available on the host machine. If no OpenCL implementation is available, then the SYCL implementation provides only the SYCL
host device to run kernels on.<o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> <o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">Almost all compiler modifications are supposed to be made in the clang project and SYCL runtime library (located in "<root>/sycl" directory).
The only change planned in LLVM project so far is new environment component in the triple.<o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> <o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">What is SYCL</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">(from
<a href="https://www.khronos.org/sycl/">https://www.khronos.org/sycl/</a>)<o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">SYCL (pronounced ‘sickle’) is a royalty-free, cross-platform abstraction layer that builds on the underlying concepts, portability and efficiency
of OpenCL that enables code for heterogeneous processors to be written in a “single-source” style using completely standard C++ language. SYCL single-source programming enables the host and kernel code for an application to be contained in the same source
file, in a type-safe way and with the simplicity of a cross-platform asynchronous task graph. SYCL includes templates and generic lambda functions to enable higher-level application software to be cleanly coded with optimized acceleration of kernel code across
the extensive range of shipping OpenCL implementations. <o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> <o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">High level overview of Intel's SYCL implementation</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">Intel's SYCL implementation consists of two major components: SYCL compiler and runtime library. Although SYCL is designed as "extension-free"
standard C++ API, there is a need to have some "compiler" extensions to enable C++ code execution on accelerators (e.g. special attributes to mark "accelerated" functions).<o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">SYCL compiler is responsible for "extracting" device part of code and compiling it to SPIR-V format or device native binary.
<a href="https://www.khronos.org/spir/">SPIR-V</a> (Standard Portable Intermediate Representation) is a standard form of the code for OpenCL<sup>TM</sup> offload API. In addition, the compiler also emits auxiliary information, which is used by the SYCL runtime
to run the device code on the accelerator via OpenCL<sup>TM</sup> API.<o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">SYCL runtime library API is a C++ abstraction layer on top of the OpenCL<sup>TM</sup> API which enables execution of C++ SYCL code on accelerators
like FPGA or GPU. <o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> <o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">We are working on making Intel's implementation sources available at GitHub (hopefully next week). Our implementation is not complete, but
we would like to start collaboration with the community interested in heterogeneous programming as early as possible to improve the quality of the implementation through design and code review process.<o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> <o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">Available SYCL resources</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><a href="https://www.khronos.org/sycl/">https://www.khronos.org/sycl/</a> - SYCL page at Khronos Group site.<o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><a href="http://sycl.tech/">http://sycl.tech/</a> - SYCL ecosystem site (supported by Codeplay). There is a list of project implemented using
SYCL programming model (e.g. Tensorflow SYCL back-end, machine learning and linear algebra libraries, etc.)
<o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><a href="https://github.com/KhronosGroup/SyclParallelSTL">https://github.com/KhronosGroup/SyclParallelSTL</a> - Parallel STL implementation
based on SYCL<o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><a href="https://github.com/triSYCL/triSYCL">https://github.com/triSYCL/triSYCL</a> - open source SYCL implementation driven by Xilinx<o:p></o:p></span></p>
<p style="margin:0cm;margin-bottom:.0001pt"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"><a href="https://www.codeplay.com/products/computesuite/computecpp">https://www.codeplay.com/products/computesuite/computecpp</a> - closed
source SYCL implementation from Codeplay<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
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