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Today, CUDA C++ has a macro that can be used to distinguish which architecture<br>
(either the host architecture, a specific device architecture, or any device<br>
architecture) code is currently being compiled for.<br>
<br>
When CUDA code is compiled for the host, __CUDA_ARCH__ is not defined. When it<br>
is compiled for the device, it is defined to a value that indicates the SM architecture.<br>
<br>
At face value, this seems like a useful way to customize how heterogeneous code<br>
is implemented on a particular architecture:<br>
<br>
__host__ __device__<br>
uint32_t iadd3(uint32_t x, uint32_t y, uint32_t z) {<br>
#if __CUDA_ARCH__ >= 200<br>
asm ("vadd.u32.u32.u32.add %0, %1, %2, %3;" : "=r"(x) : "r"(x), "r"(y), "r"(z));<br>
#else<br>
x = x + y + z;<br>
#endif<br>
return x;<br>
}<br>
<br>
However, __CUDA_ARCH__ is only well suited to a split compilation CUDA compiler,<br>
like NVCC, which uses a separate host compiler (GCC, Clang, MSVC, etc) and device<br>
compiler, preprocessing and compiling your code once for each target architecture<br>
(once for the host, and one time for each target device architecture).<br>
<br>
__CUDA_ARCH__ has some caveats, however. The NVCC compiler has to see all kernel<br>
function declarations (e.g. __global__ functions) during both host and device<br>
compilation, to generate the host side launch stubs and the actual device side<br>
kernel code. Otherwise, NVCC may not compile the device side kernel code, either<br>
because it believes it is unused or because it is never instantiated (in the case<br>
of a template kernel function). This, regretably, will not fail at compile time, <br>
but instead fails at runtime when you attempt to launch the (non-existant) kernel.<br>
<br>
Consider the following code. It unconditionally calls `parallel::reduce_n_impl`<br>
on the host, which instantiates some (unseen) template kernel functions during<br>
host compilation. However, in device code, if THRUST_HAS_CUDART is false, <br>
`parallel::reduce_n_impl` is never instantiated and the actual device code for<br>
the kernel functions are never compiled.<br>
<br>
#if !defined(__CUDA_ARCH__) || (__CUDA_ARCH__>= 350 && defined(__CUDACC_RDC__))<br>
// We're either not compiling as device code, or we are compiling as device<br>
// code and we can launch kernels from device code (SM 3.5 and higher + <br>
// relocatable device code is required for the device side runtime which is<br>
// needed to do device side launches). <br>
# define THRUST_HAS_CUDART 1<br>
#else<br>
# define THRUST_HAS_CUDART 0<br>
#endif<br>
<br>
namespace thrust {<br>
<br>
#pragma nv_exec_check_disable<br>
template <typename Derived,<br>
typename InputIt,<br>
typename Size,<br>
typename T,<br>
typename BinaryOp><br>
__host__ __device__<br>
T reduce_n(execution_policy<Derived>& policy,<br>
InputIt first,<br>
Size num_items,<br>
T init,<br>
BinaryOp binary_op)<br>
{<br>
// Broken version:<br>
#if THRUST_HAS_CUDART<br>
return system::cuda::reduce_n_impl(policy, first, num_items, init, binary_op);<br>
#else<br>
// We are running on the device and there is no device side runtime, so we<br>
// can't launch a kernel to do the reduction in parallel. Instead, we just<br>
// do a sequential reduction in the calling thread.<br>
return system::sequential::reduce_n_impl(first, num_items, init, binary_op);<br>
#endif<br>
}<br>
<br>
} // namespace thrust<br>
<br>
Instead, we end up using the rather odd pattern of adding a (non-constexpr) if<br>
statement whose condition is known at compile time. This ensures the kernel function<br>
is instantiated during device compilation, even though it is not actually used.<br>
Fortunately, while NVCC can as-if optimize away the if statement, it cannot treat<br>
the instantiation as unused.<br>
<br>
#pragma nv_exec_check_disable<br>
template <typename Derived,<br>
typename InputIt,<br>
typename Size,<br>
typename T,<br>
typename BinaryOp><br>
__host__ __device__<br>
T reduce_n(execution_policy<Derived>& policy,<br>
InputIt first,<br>
Size num_items,<br>
T init,<br>
BinaryOp binary_op)<br>
{<br>
if (THRUST_HAS_CUDART)<br>
return parallel::reduce_n_impl(policy, first, num_items, init, binary_op);<br>
<br>
#if !THRUST_HAS_CUDART<br>
// We are running on the device and there is no device side runtime, so we<br>
// can't launch a kernel to do the reduction in parallel. Instead, we just<br>
// do a sequential reduction in the calling thread.<br>
return sequential::reduce_n_impl(first, num_items, init, binary_op);<br>
#endif<br>
}<br>
<br>
For more background, see:<br>
<br>
https://github.com/NVlabs/cub/issues/30<br>
https://stackoverflow.com/questions/51248770/cuda-arch-flag-with-thrust-execution-policy<br>
<br>
For a merged parse CUDA compiler, like Clang CUDA, __CUDA_ARCH__ is a poor fit, <br>
because as a textual macro it can be used to completely change the code that <br>
the compiler consumes during host and device compilation, essentially forcing<br>
separate preprocessing and parsing.<br>
<br>
Clang CUDA offers one alternative today, __host__ / __device__ overloading,<br>
which is better suited to a merged parse model:<br>
<br>
__device__<br>
uint32_t iadd3(uint32_t x, uint32_t y, uint32_t z) {<br>
asm ("vadd.u32.u32.u32.add %0, %1, %2, %3;" : "=r"(x) : "r"(x), "r"(y), "r"(z));<br>
return x;<br>
}<br>
<br>
__host__ <br>
uint32_t iadd3(uint32_t x, uint32_t y, uint32_t z) {<br>
return x + y + z;<br>
}<br>
<br>
However, this approach does not allow us to customize code for specific device<br>
architectures. Note that the above code will not compile on SM 1.0 devices, as<br>
the inline assembly contains instructions unavailable on those platforms.<br>
<br>
Tuning for specific device architectures is critical for high performance CUDA<br>
libraries, like Thrust. We need to be able to select different algorithms and<br>
use architecture specific facilities to get speed of light performance.<br>
<br>
Fortunately, there is some useful prior art. Clang (and GCC) has a related feature,<br>
__attribute__((target("..."))), which can be used to define a function "overloaded"<br>
on the architecture it is compiled for. One common use case for this feature is<br>
implementing functions that utilize micro-architecture specific CPU SIMD<br>
instructions:<br>
<br>
using double4 = double __attribute__((__vector_size__(32)));<br>
<br>
__attribute__((target("sse")))<br>
double4 fma(double4d x, double4 y, double4 z);<br>
<br>
__attribute__((target("avx")))<br>
double4 fma(double4d x, double4 y, double4 z);<br>
<br>
__attribute__((target("default")))<br>
double4 fma(double4d x, double4 y, double4 z); // "Fallback" implementation.<br>
<br>
This attribute can also be used to target specific architectures:<br>
<br>
__attribute__((target("arch=atom")))<br>
void foo(); // Will be called on 'atom' processors.<br>
<br>
__attribute__((target("default")))<br>
void foo(); // Will be called on any other processors.<br>
<br>
This could easily be extended for heterogeneous compilation:<br>
<br>
__attribute__((target("host:arch=skylake")))<br>
void foo();<br>
<br>
__attribute__((target("arch=atom")))<br>
void foo(); // Implicitly "host:arch=atom".<br>
<br>
__attribute__((target("host:default")))<br>
void foo();<br>
<br>
__attribute__((target("device:arch=sm_20")))<br>
void foo();<br>
<br>
__attribute__((target("device:arch=sm_60")))<br>
void foo();<br>
<br>
__attribute__((target("device:default")))<br>
void foo();<br>
<br>
Or, perhaps more concisely, we could introduce this shorthand:<br>
<br>
__host__("arch=skylake")<br>
void foo();<br>
<br>
__host__<br>
void foo(); // Implicitly "host:default".<br>
<br>
__device__("arch=sm_20")<br>
void foo();<br>
<br>
__device__("arch=sm_60")<br>
void foo();<br>
<br>
__device__ // Implicitly "device:default".<br>
void foo();<br>
<br>
Another place that we use _CUDA_ARCH__ today in Thrust and CUB is in<br>
metaprogramming code that selects the correct "strategies" that should be<br>
used to implement a particular algorithm:<br>
<br>
enum arch {
<div> host,<br>
sm_30, sm_32, sm_35, // Kepler<br>
sm_50, sm_52, sm_53, // Maxwell<br>
sm_60, sm_61, sm_62, // Pascal<br>
sm_70, // Volta<br>
sm_72, sm_75 // Turing<br>
};<br>
<div><br>
</div>
<div> __host__ __device__<br>
constexpr arch select_arch()<br>
{<br>
switch (__CUDA_ARCH__)<br>
{<br>
// ...<br>
}; <br>
}<br>
<br>
template <class T, arch Arch = select_arch()><br>
struct radix_sort_tuning;<br>
<br>
template <class T><br>
struct radix_sort_tuning<T, sm_35><br>
{<br>
constexpr size_t INPUT_SIZE = sizeof(T);<br>
<br>
constexpr size_t NOMINAL_4B_ITEMS_PER_THREAD = 11;<br>
constexpr size_t ITEMS_PER_THREAD<br>
= std::min(NOMIMAL_4B_ITEMS_PER_THREAD,<br>
std::max(1, (NOMIMAL_4B_ITEMS_PER_THREAD * 4 / INPUT_SIZE)));<br>
<br>
constexpr size_t BLOCK_THREADS = 256;<br>
constexpr auto BLOCK_LOAD_STRATEGY = BLOCK_LOAD_WARP_TRANSPOSE;<br>
constexpr auto CACHE_LOAD_STRATEGY = LOAD_LDG;<br>
constexpr auto BLOCK_STORE_STRATEGY = BLOCK_STORE_WARP_TRANSPOSE;<br>
};<br>
<br>
template <typename T><br>
struct radix_sort_tuning<T, sm_50> { /* ... */ };<br>
<br>
// ...<br>
<br>
With heterogeneous target attributes, we could implement select_arch like<br>
so:<br>
<br>
<span style="font-family: Consolas, Courier, monospace, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 16px;"> __host__</span><br style="font-family: Consolas, Courier, monospace, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 16px;">
<span style="font-family: Consolas, Courier, monospace, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 16px;"> constexpr arch select_arch() { return host; }</span><br>
<br>
__device__("arch=sm_30")<br>
constexpr arch select_arch() { return sm_30; }<br>
<br>
__device__("arch=sm_35")<br>
constexpr arch select_arch() { return sm_35; }<br>
<br>
// ...<br>
<br>
You could also potentially use this with if constexpr:
<div><br>
</div>
<div> void foo()</div>
<div> {</div>
<div> // Moral equivalent of #if __CUDA_ARCH__</div>
<div> if constexpr (host != select_arch())</div>
<div> // ...</div>
<div> else</div>
<div> // ...</div>
<div> }<br>
<br>
This feature would also make it much easier to port some of the more tricky parts<br>
of libc++ to GPUs, such as iostreams and concurrency primitives.<br>
<br>
It would be awesome if we could take __host__ / __device__ overloading a step<br>
further and make it a full fledged replacement for __CUDA_ARCH__. It would provide<br>
a possible future migration path away from __CUDA_ARCH__, which would enable us to<br>
move to true merged parsing for heterogeneous C++: preprocess once, parse once,<br>
perform platform-agnostic optimizations once, code gen multiple times.<br>
<br>
So, questions:<br>
<div><br>
</div>
<div><span style="font-family: Consolas, Courier, monospace, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 16px;">- Can target attributes go on constexpr functions today?</span></div>
- Does anyone have suggestions for how this approach could be improved? Alternatives?</div>
<div>- Is there interest in this in Clang CUDA?</div>
<div></div>
<div><br>
------------------------------------------------------<br>
Bryce Adelstein Lelbach aka wash<br>
ISO C++ LEWGI Chair<br>
CppCon and C++Now Program Chair<br>
Thrust Maintainer, HPX Developer<br>
CUDA Convert and Reformed AVX Junkie<br>
<br>
Ask "Dumb" Questions<br>
------------------------------------------------------<br>
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