<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:x="urn:schemas-microsoft-com:office:excel" xmlns:p="urn:schemas-microsoft-com:office:powerpoint" xmlns:a="urn:schemas-microsoft-com:office:access" xmlns:dt="uuid:C2F41010-65B3-11d1-A29F-00AA00C14882" xmlns:s="uuid:BDC6E3F0-6DA3-11d1-A2A3-00AA00C14882" xmlns:rs="urn:schemas-microsoft-com:rowset" xmlns:z="#RowsetSchema" xmlns:b="urn:schemas-microsoft-com:office:publisher" xmlns:ss="urn:schemas-microsoft-com:office:spreadsheet" xmlns:c="urn:schemas-microsoft-com:office:component:spreadsheet" xmlns:odc="urn:schemas-microsoft-com:office:odc" xmlns:oa="urn:schemas-microsoft-com:office:activation" xmlns:html="http://www.w3.org/TR/REC-html40" xmlns:q="http://schemas.xmlsoap.org/soap/envelope/" xmlns:rtc="http://microsoft.com/officenet/conferencing" xmlns:D="DAV:" xmlns:Repl="http://schemas.microsoft.com/repl/" xmlns:mt="http://schemas.microsoft.com/sharepoint/soap/meetings/" xmlns:x2="http://schemas.microsoft.com/office/excel/2003/xml" xmlns:ppda="http://www.passport.com/NameSpace.xsd" xmlns:ois="http://schemas.microsoft.com/sharepoint/soap/ois/" xmlns:dir="http://schemas.microsoft.com/sharepoint/soap/directory/" xmlns:ds="http://www.w3.org/2000/09/xmldsig#" xmlns:dsp="http://schemas.microsoft.com/sharepoint/dsp" xmlns:udc="http://schemas.microsoft.com/data/udc" xmlns:xsd="http://www.w3.org/2001/XMLSchema" xmlns:sub="http://schemas.microsoft.com/sharepoint/soap/2002/1/alerts/" xmlns:ec="http://www.w3.org/2001/04/xmlenc#" xmlns:sp="http://schemas.microsoft.com/sharepoint/" xmlns:sps="http://schemas.microsoft.com/sharepoint/soap/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:udcs="http://schemas.microsoft.com/data/udc/soap" xmlns:udcxf="http://schemas.microsoft.com/data/udc/xmlfile" xmlns:udcp2p="http://schemas.microsoft.com/data/udc/parttopart" xmlns:wf="http://schemas.microsoft.com/sharepoint/soap/workflow/" xmlns:dsss="http://schemas.microsoft.com/office/2006/digsig-setup" xmlns:dssi="http://schemas.microsoft.com/office/2006/digsig" xmlns:mdssi="http://schemas.openxmlformats.org/package/2006/digital-signature" xmlns:mver="http://schemas.openxmlformats.org/markup-compatibility/2006" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns:mrels="http://schemas.openxmlformats.org/package/2006/relationships" xmlns:spwp="http://microsoft.com/sharepoint/webpartpages" xmlns:ex12t="http://schemas.microsoft.com/exchange/services/2006/types" xmlns:ex12m="http://schemas.microsoft.com/exchange/services/2006/messages" xmlns:pptsl="http://schemas.microsoft.com/sharepoint/soap/SlideLibrary/" xmlns:spsl="http://microsoft.com/webservices/SharePointPortalServer/PublishedLinksService" xmlns:Z="urn:schemas-microsoft-com:" xmlns:st="" xmlns="http://www.w3.org/TR/REC-html40"><head><meta http-equiv=Content-Type content="text/html; charset=us-ascii"><meta name=Generator content="Microsoft Word 12 (filtered medium)"><style><!--
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</o:shapelayout></xml><![endif]--></head><body lang=EN-GB link=blue vlink=purple><div class=WordSection1><p class=MsoNormal>Hi,<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>I noticed that the Clang driver requires the user to set "-ccc-host-triple" for cross-compilation (if not using the -arch behaviour on Darwin). I thought this was a little strange as the option is not documented in the --help, is nonstandard and nonobvious.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>I delved a little deeper, and found a bunch of FIXMEs in the driver wanting to tablegen lots of if/else statements selecting specific architecture options (AddARMTargetArgs being the worst culprit). Adding to that, some of these monolithic functions were duplicated with static linkage in multiple files.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>I've factored most of these if/else blocks into one tablegen file, which when #included forms an "architecture definition database" from which one can query default CPUs for given architecture/OS, which architecture a CPU belongs to, and any other target-specific feature of the CPU defined in the .td file.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>The tablegen file is a list of known architecture variants and CPUs for different platforms; we are happy to maintain the ARM part of this.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>The upshot of this is that several monolithic functions have disappeared:<o:p></o:p></p><p class=MsoNormal> * Tool{s,Chain}.cpp:GetARMTargetCPU (replaced with Arch->DefaultCpu)<o:p></o:p></p><p class=MsoNormal> * Tool{s,Chain}.cpp:getLLVMArchSuffixForARM (replaced with Arch->Properties["LLVMArchSuffix"])<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>And "Tools.cpp:Add{ARM,Sparc,MIPS,X86}TargetArgs" have been simplified to contain fewer if/elses.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>The above was all just general tidyup; after this refactor, a 3 line change in Driver.cpp now causes autodetection of the host triple from any -mcpu= or -march= options passed. For example:<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal> clang -mcpu=cortex-a8 test.c -o test.o -c<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>will set the HostTriple to "armv7--", which obviously then enables AddARMTargetArgs to be called instead of AddX86TargetArgs, and correct ARM code is produced.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>I feel that this is a much more sane behaviour than mandating the use of -ccc-host-triple (although the behaviour of that option has not been altered and overrides any auto-detection); if a user specifies a CPU which is obviously part of an architecture, or a -march=something-that-isn't-the-host, the HostTriple should be detected automatically.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>As a result of this, taking the line of thought that -ccc-host-triple should be optional and should be able to be fully functionally replaced by -mcpu=/-march= and friends, I realised there was no way to dictate the host OS without use of -ccc-host-triple. So I added a -mos= option, which sets the OSAndEnvironment part of the llvm::Triple. This way, almost all functionality offered by overriding the triple (still wanted for power users) is available via more recognisable command line options.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>The patch I have attached is the entire patch + testcases, so is rather large. If accepted, I intend to send to the commit list in several chunks:<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal> 1. Tablegen file, new files ArchDefs.h and ArchDefs.cpp (+ new tablegen backend to llvm-commits)<o:p></o:p></p><p class=MsoNormal> - This patch should not alter the behaviour of Clang at all, hence no tests being added.<o:p></o:p></p><p class=MsoNormal> 2. First usecase of the ArchDefs class: the ARM target. Removes GetARMTargetCPU and getLLVMArchSuffixForARM, and changes the default command line behaviour to infer target triple from -mcpu/-march if present.<o:p></o:p></p><p class=MsoNormal> - As there is now a use case for the ArchDefs class, testcases will be added to this patch.<o:p></o:p></p><p class=MsoNormal> 3. Refactoring intel / mips target specifics to use ArchDefs. This is the most likely patch to cause problems with other uses that I haven't forseen.<o:p></o:p></p><p class=MsoNormal> 4. Adding -mos= and making it have an effect on the host triple.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Patch 2. also contains several bugfixes to the ARM driver, namely:<o:p></o:p></p><p class=MsoNormal> * ARM target driver would not detect -mabi=eabi/gnueabi correctly.<o:p></o:p></p><p class=MsoNormal> * ARM target driver when setting -mabi= would not update the Triple and so the float-abi check later would be incorrect.<o:p></o:p></p><p class=MsoNormal> * ARM target driver did not have knowledge of several ARM cores: Cortex-A{8,9,15}, Cortex-R{4,5,7}, Cortex-M{0,3,4}, ARM11MPCore, ARM1176.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Review of both the patch and the intended functional change would be excellent.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Cheers,<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>James<o:p></o:p></p></div></body></html>