[cfe-dev] [RFC] Add SYCL programming model support.
Ronan KERYELL via cfe-dev
cfe-dev at lists.llvm.org
Fri Jan 11 11:28:47 PST 2019
>>>>> On Fri, 11 Jan 2019 18:02:26 +0000, "Bader, Alexey via cfe-dev" <cfe-dev at lists.llvm.org> said:
Alexey> TLDR We (Intel) would like to request to add SYCL
Alexey> programming model support to LLVM/Clang project to
Alexey> facilitate collaboration on C++ single-source heterogeneous
Alexey> programming for accelerators like GPU, FPGA, DSP, etc. from
Alexey> different hardware and software vendors.
Just... amazing! :-)
Alexey> I'm looking for suggestions on what is the best way to
Alexey> proceed with this proposal. I would appreciate any feedback.
Keep me counted, when you make it available on-line.
Alexey> We are working on making Intel's implementation sources
Alexey> available at GitHub (hopefully next week). Our
Alexey> implementation is not complete, but we would like to start
Alexey> collaboration with the community interested in heterogeneous
Alexey> programming as early as possible to improve the quality of
Alexey> the implementation through design and code review process.
That sounds great!
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