<div dir="ltr"><div dir="ltr">On Tue, 25 Jun 2019 at 09:49, Simon Tatham via cfe-commits <<a href="mailto:cfe-commits@lists.llvm.org">cfe-commits@lists.llvm.org</a>> wrote:<br></div><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Author: statham<br>
Date: Tue Jun 25 09:49:32 2019<br>
New Revision: 364331<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=364331&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=364331&view=rev</a><br>
Log:<br>
[ARM] Support inline assembler constraints for MVE.<br>
<br>
"To" selects an odd-numbered GPR, and "Te" an even one. There are some<br>
8.1-M instructions that have one too few bits in their register fields<br>
and require registers of particular parity, without necessarily using<br>
a consecutive even/odd pair.<br>
<br>
Also, the constraint letter "t" should select an MVE q-register, when<br>
MVE is present. This didn't need any source changes, but some extra<br>
tests have been added.<br>
<br>
Reviewers: dmgreen, samparker, SjoerdMeijer<br>
<br>
Subscribers: javed.absar, eraman, kristof.beyls, hiraditya, cfe-commits, llvm-commits<br>
<br>
Tags: #clang, #llvm<br>
<br>
Differential Revision: <a href="https://reviews.llvm.org/D60709" rel="noreferrer" target="_blank">https://reviews.llvm.org/D60709</a><br>
<br>
Modified:<br>
cfe/trunk/lib/Basic/Targets/ARM.cpp<br>
cfe/trunk/test/CodeGen/arm-asm.c<br>
<br>
Modified: cfe/trunk/lib/Basic/Targets/ARM.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/ARM.cpp?rev=364331&r1=364330&r2=364331&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/ARM.cpp?rev=364331&r1=364330&r2=364331&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/lib/Basic/Targets/ARM.cpp (original)<br>
+++ cfe/trunk/lib/Basic/Targets/ARM.cpp Tue Jun 25 09:49:32 2019<br>
@@ -900,6 +900,16 @@ bool ARMTargetInfo::validateAsmConstrain<br>
case 'Q': // A memory address that is a single base register.<br>
Info.setAllowsMemory();<br>
return true;<br>
+ case 'T':<br>
+ switch (Name[1]) {<br>
+ default:<br>
+ break;<br>
+ case 'e': // Even general-purpose register<br>
+ case 'o': // Odd general-purpose register<br>
+ Info.setAllowsRegister();<br>
+ Name++;<br>
+ return true;<br>
+ }<br></blockquote><div><br></div><div>lib/Basic/Targets/ARM.cpp:913:3: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]<br> case 'U': // a memory reference...<br> ^<br>lib/Basic/Targets/ARM.cpp:913:3: note: insert 'LLVM_FALLTHROUGH;' to silence this warning<br> case 'U': // a memory reference...<br> ^<br> LLVM_FALLTHROUGH; <br>lib/Basic/Targets/ARM.cpp:913:3: note: insert 'break;' to avoid fall-through<br> case 'U': // a memory reference...<br> ^<br> break; <br></div><div><br></div><div>Did you mean for this to fall through to the case 'U' below? If so, please add an explicit LLVM_FALLTHROUGH; and a test for this behavior. Otherwise, please fix :)</div><div> <br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
case 'U': // a memory reference...<br>
switch (Name[1]) {<br>
case 'q': // ...ARMV4 ldrsb<br>
@@ -923,6 +933,7 @@ std::string ARMTargetInfo::convertConstr<br>
std::string R;<br>
switch (*Constraint) {<br>
case 'U': // Two-character constraint; add "^" hint for later parsing.<br>
+ case 'T':<br>
R = std::string("^") + std::string(Constraint, 2);<br>
Constraint++;<br>
break;<br>
<br>
Modified: cfe/trunk/test/CodeGen/arm-asm.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-asm.c?rev=364331&r1=364330&r2=364331&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-asm.c?rev=364331&r1=364330&r2=364331&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/arm-asm.c (original)<br>
+++ cfe/trunk/test/CodeGen/arm-asm.c Tue Jun 25 09:49:32 2019<br>
@@ -6,3 +6,21 @@ int t1() {<br>
__asm__ volatile ("flds s15, %[k] \n" :: [k] "Uv" (k) : "s15");<br>
return 0;<br>
}<br>
+<br>
+// CHECK-LABEL: @even_reg_constraint_Te<br>
+int even_reg_constraint_Te(void) {<br>
+ int acc = 0;<br>
+ // CHECK: vaddv{{.*\^Te}}<br>
+ asm("vaddv.s8 %0, Q0"<br>
+ : "+Te" (acc));<br>
+ return acc;<br>
+}<br>
+<br>
+// CHECK-LABEL: @odd_reg_constraint_To<br>
+int odd_reg_constraint_To(void) {<br>
+ int eacc = 0, oacc = 0;<br>
+ // CHECK: vaddlv{{.*\^To}}<br>
+ asm("vaddlv.s8 %0, %1, Q0"<br>
+ : "+Te" (eacc), "+To" (oacc));<br>
+ return oacc;<br>
+}<br>
<br>
<br>
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</blockquote></div></div>