<div dir="ltr">This was due to r340519. I've fixed it in r340596 to clean things up.</div><br><div class="gmail_quote"><div dir="ltr">On Thu, Aug 23, 2018 at 8:20 PM Chandler Carruth <<a href="mailto:chandlerc@gmail.com">chandlerc@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Trying new address again...</div><div dir="ltr"><br><br><div class="gmail_quote"><div dir="ltr">On Thu, Aug 23, 2018 at 8:17 PM Chandler Carruth <<a href="mailto:chandlerc@gmail.com" target="_blank">chandlerc@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div class="gmail_quote"><div>Sorry for ancient thread revival, but...</div></div></div><div dir="ltr"><div class="gmail_quote"><div dir="ltr"><br></div><div dir="ltr">On Mon, Feb 6, 2017 at 2:10 AM Dylan McKay via cfe-commits <<a href="mailto:cfe-commits@lists.llvm.org" target="_blank">cfe-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: dylanmckay<br>
Date: Mon Feb 6 03:01:59 2017<br>
New Revision: 294176<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=294176&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=294176&view=rev</a><br>
Log:<br>
[AVR] Add support for the full set of inline asm constraints<br>
<br>
Summary:<br>
Previously the method would simply return false, causing every single<br>
inline assembly constraint to trigger a compile error.<br>
<br>
This adds inline assembly constraint support for the AVR target.<br>
<br>
This patch is derived from the code in<br>
AVRISelLowering::getConstraintType.<br>
<br>
More details can be found on the AVR-GCC reference wiki<br>
<a href="http://www.nongnu.org/avr-libc/user-manual/inline_asm.html" rel="noreferrer" target="_blank">http://www.nongnu.org/avr-libc/user-manual/inline_asm.html</a><br>
<br>
Reviewers: jroelofs, asl<br>
<br>
Reviewed By: asl<br>
<br>
Subscribers: asl, ahatanak, saaadhu, cfe-commits<br>
<br>
Differential Revision: <a href="https://reviews.llvm.org/D28344" rel="noreferrer" target="_blank">https://reviews.llvm.org/D28344</a><br>
<br>
Added:<br>
cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c<br></blockquote><div><br></div></div></div><div dir="ltr"><div class="gmail_quote"><div>This test is currently failing. Can you look at fixing it?</div></div></div><div dir="ltr"><div class="gmail_quote"><div><br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
cfe/trunk/test/CodeGen/avr-unsupported-inline-asm-constraints.c<br>
Modified:<br>
cfe/trunk/lib/Basic/Targets.cpp<br>
<br>
Modified: cfe/trunk/lib/Basic/Targets.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=294176&r1=294175&r2=294176&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=294176&r1=294175&r2=294176&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/lib/Basic/Targets.cpp (original)<br>
+++ cfe/trunk/lib/Basic/Targets.cpp Mon Feb 6 03:01:59 2017<br>
@@ -8517,6 +8517,57 @@ public:<br>
<br>
bool validateAsmConstraint(const char *&Name,<br>
TargetInfo::ConstraintInfo &Info) const override {<br>
+ // There aren't any multi-character AVR specific constraints.<br>
+ if (StringRef(Name).size() > 1) return false;<br>
+<br>
+ switch (*Name) {<br>
+ default: return false;<br>
+ case 'a': // Simple upper registers<br>
+ case 'b': // Base pointer registers pairs<br>
+ case 'd': // Upper register<br>
+ case 'l': // Lower registers<br>
+ case 'e': // Pointer register pairs<br>
+ case 'q': // Stack pointer register<br>
+ case 'r': // Any register<br>
+ case 'w': // Special upper register pairs<br>
+ case 't': // Temporary register<br>
+ case 'x': case 'X': // Pointer register pair X<br>
+ case 'y': case 'Y': // Pointer register pair Y<br>
+ case 'z': case 'Z': // Pointer register pair Z<br>
+ Info.setAllowsRegister();<br>
+ return true;<br>
+ case 'I': // 6-bit positive integer constant<br>
+ Info.setRequiresImmediate(0, 63);<br>
+ return true;<br>
+ case 'J': // 6-bit negative integer constant<br>
+ Info.setRequiresImmediate(-63, 0);<br>
+ return true;<br>
+ case 'K': // Integer constant (Range: 2)<br>
+ Info.setRequiresImmediate(2);<br>
+ return true;<br>
+ case 'L': // Integer constant (Range: 0)<br>
+ Info.setRequiresImmediate(0);<br>
+ return true;<br>
+ case 'M': // 8-bit integer constant<br>
+ Info.setRequiresImmediate(0, 0xff);<br>
+ return true;<br>
+ case 'N': // Integer constant (Range: -1)<br>
+ Info.setRequiresImmediate(-1);<br>
+ return true;<br>
+ case 'O': // Integer constant (Range: 8, 16, 24)<br>
+ Info.setRequiresImmediate({8, 16, 24});<br>
+ return true;<br>
+ case 'P': // Integer constant (Range: 1)<br>
+ Info.setRequiresImmediate(1);<br>
+ return true;<br>
+ case 'R': // Integer constant (Range: -6 to 5)<br>
+ Info.setRequiresImmediate(-6, 5);<br>
+ return true;<br>
+ case 'G': // Floating point constant<br>
+ case 'Q': // A memory address based on Y or Z pointer with displacement.<br>
+ return true;<br>
+ }<br>
+<br>
return false;<br>
}<br>
<br>
<br>
Added: cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c?rev=294176&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c?rev=294176&view=auto</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c (added)<br>
+++ cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c Mon Feb 6 03:01:59 2017<br>
@@ -0,0 +1,124 @@<br>
+// REQUIRES: avr-registered-target<br>
+// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm -o - %s | FileCheck %s<br>
+<br>
+int data;<br>
+<br>
+void a() {<br>
+ // CHECK: call void asm sideeffect "add r5, $0", "a"(i16 %0)<br>
+ asm("add r5, %0" :: "a"(data));<br>
+}<br>
+<br>
+void b() {<br>
+ // CHECK: call void asm sideeffect "add r5, $0", "b"(i16 %0)<br>
+ asm("add r5, %0" :: "b"(data));<br>
+}<br>
+<br>
+void d() {<br>
+ // CHECK: call void asm sideeffect "add r5, $0", "d"(i16 %0)<br>
+ asm("add r5, %0" :: "d"(data));<br>
+}<br>
+<br>
+void l() {<br>
+ // CHECK: call void asm sideeffect "add r5, $0", "l"(i16 %0)<br>
+ asm("add r5, %0" :: "l"(data));<br>
+}<br>
+<br>
+void e() {<br>
+ // CHECK: call void asm sideeffect "add r5, $0", "e"(i16 %0)<br>
+ asm("add r5, %0" :: "e"(data));<br>
+}<br>
+<br>
+void q() {<br>
+ // CHECK: call void asm sideeffect "add r5, $0", "q"(i16 %0)<br>
+ asm("add r5, %0" :: "q"(data));<br>
+}<br>
+<br>
+void r() {<br>
+ // CHECK: call void asm sideeffect "add r5, $0", "r"(i16 %0)<br>
+ asm("add r5, %0" :: "r"(data));<br>
+}<br>
+<br>
+void w() {<br>
+ // CHECK: call void asm sideeffect "add r5, $0", "w"(i16 %0)<br>
+ asm("add r5, %0" :: "w"(data));<br>
+}<br>
+<br>
+void t() {<br>
+ // CHECK: call void asm sideeffect "add r5, $0", "t"(i16 %0)<br>
+ asm("add r5, %0" :: "t"(data));<br>
+}<br>
+<br>
+void x() {<br>
+ // CHECK: call void asm sideeffect "add r5, $0", "x"(i16 %0)<br>
+ asm("add r5, %0" :: "x"(data));<br>
+}<br>
+<br>
+void y() {<br>
+ // CHECK: call void asm sideeffect "add r5, $0", "y"(i16 %0)<br>
+ asm("add r5, %0" :: "y"(data));<br>
+}<br>
+<br>
+void z() {<br>
+ // CHECK: call void asm sideeffect "add r5, $0", "z"(i16 %0)<br>
+ asm("add r5, %0" :: "z"(data));<br>
+}<br>
+<br>
+void I() {<br>
+ // CHECK: call void asm sideeffect "subi r30, $0", "I"(i16 50)<br>
+ asm("subi r30, %0" :: "I"(50));<br>
+}<br>
+<br>
+void J() {<br>
+ // CHECK: call void asm sideeffect "subi r30, $0", "J"(i16 -50)<br>
+ asm("subi r30, %0" :: "J"(-50));<br>
+}<br>
+<br>
+void K() {<br>
+ // CHECK: call void asm sideeffect "subi r30, $0", "K"(i16 2)<br>
+ asm("subi r30, %0" :: "K"(2));<br>
+}<br>
+<br>
+void L() {<br>
+ // CHECK: call void asm sideeffect "subi r30, $0", "L"(i16 0)<br>
+ asm("subi r30, %0" :: "L"(0));<br>
+}<br>
+<br>
+void M() {<br>
+ // CHECK: call void asm sideeffect "subi r30, $0", "M"(i16 255)<br>
+ asm("subi r30, %0" :: "M"(255));<br>
+}<br>
+<br>
+void O() {<br>
+ // CHECK: call void asm sideeffect "subi r30, $0", "O"(i16 16)<br>
+ asm("subi r30, %0" :: "O"(16));<br>
+}<br>
+<br>
+void P() {<br>
+ // CHECK: call void asm sideeffect "subi r30, $0", "P"(i16 1)<br>
+ asm("subi r30, %0" :: "P"(1));<br>
+}<br>
+<br>
+void R() {<br>
+ // CHECK: call void asm sideeffect "subi r30, $0", "R"(i16 -3)<br>
+ asm("subi r30, %0" :: "R"(-3));<br>
+}<br>
+<br>
+void G() {<br>
+ // CHECK: call void asm sideeffect "subi r30, $0", "G"(i16 50)<br>
+ asm("subi r30, %0" :: "G"(50));<br>
+}<br>
+<br>
+void Q() {<br>
+ // CHECK: call void asm sideeffect "subi r30, $0", "Q"(i16 50)<br>
+ asm("subi r30, %0" :: "Q"(50));<br>
+}<br>
+<br>
+void ra() {<br>
+ // CHECK: call void asm sideeffect "subi r30, $0", "ra"(i16 50)<br>
+ asm("subi r30, %0" :: "ra"(50));<br>
+}<br>
+<br>
+void ora() {<br>
+ // CHECK: call i16 asm "subi r30, $0", "=ra"()<br>
+ asm("subi r30, %0" : "=ra"(data));<br>
+}<br>
<br>
Added: cfe/trunk/test/CodeGen/avr-unsupported-inline-asm-constraints.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avr-unsupported-inline-asm-constraints.c?rev=294176&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avr-unsupported-inline-asm-constraints.c?rev=294176&view=auto</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/avr-unsupported-inline-asm-constraints.c (added)<br>
+++ cfe/trunk/test/CodeGen/avr-unsupported-inline-asm-constraints.c Mon Feb 6 03:01:59 2017<br>
@@ -0,0 +1,8 @@<br>
+// RUN: %clang_cc1 -triple avr-unknown-unknown -verify %s<br>
+<br>
+const unsigned char val = 0;<br>
+<br>
+int foo() {<br>
+ __asm__ volatile("foo %0, 1" : : "fo" (val)); // expected-error {{invalid input constraint 'fo' in asm}}<br>
+ __asm__ volatile("foo %0, 1" : : "Nd" (val)); // expected-error {{invalid input constraint 'Nd' in asm}}<br>
+}<br>
<br>
<br>
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</blockquote></div></div></blockquote></div></div></blockquote></div>