<html><head><meta http-equiv="Content-Type" content="text/html; charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; line-break: after-white-space;" class="">Sorry, I have no particular insight. My commit was reapplied verbatim shortly after that and the tests passed, so I’m not sure if there’s any relation.<br class=""><div><br class=""><blockquote type="cite" class=""><div class="">On Sep 13, 2017, at 4:16 AM, Tsafrir, Yael <<a href="mailto:yael.tsafrir@intel.com" class="">yael.tsafrir@intel.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div class="WordSection1" style="page: WordSection1; font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;"><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">Hello Galina,<o:p class=""></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""><o:p class=""> </o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">I tried to re-create the issue but with no success. I ran the test on versions before and after my commit, using your builder’s cmake properties, and the test passed each time.<o:p class=""></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">There doesn’t seem to be a connection between my commit’s changes and the failed test.<o:p class=""></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""><o:p class=""> </o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">We checked the test’s history and the message in<span class="Apple-converted-space"> </span><a href="https://reviews.llvm.org/rL259715" style="color: purple; text-decoration: underline;" class="">https://reviews.llvm.org/rL259715</a><span class="Apple-converted-space"> </span>suggests that the last time this test was modified, there were buildbots failures – could those failures be related or similar to the failures we are seeing now?<o:p class=""></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""><o:p class=""> </o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">I’ve CC’d Ben Langmuir and Quentin Colombet as they dealt with rL259715.<o:p class=""></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""><o:p class=""> </o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">Is there anyone who could help or provide more details about the test failure?<o:p class=""></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""><o:p class=""> </o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">Thanks,<o:p class=""></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">Yael</span><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""><o:p class=""></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><a name="_MailEndCompose" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""><o:p class=""> </o:p></span></a></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><b class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif;" class="">From:</span></b><span style="font-size: 11pt; font-family: Calibri, sans-serif;" class=""><span class="Apple-converted-space"> </span>Galina Kistanova [<a href="mailto:gkistanova@gmail.com" style="color: purple; text-decoration: underline;" class="">mailto:gkistanova@gmail.com</a>]<span class="Apple-converted-space"> </span><br class=""><b class="">Sent:</b><span class="Apple-converted-space"> </span>Tuesday, September 12, 2017 21:16<br class=""><b class="">To:</b><span class="Apple-converted-space"> </span>Tsafrir, Yael <<a href="mailto:yael.tsafrir@intel.com" style="color: purple; text-decoration: underline;" class="">yael.tsafrir@intel.com</a>><br class=""><b class="">Cc:</b><span class="Apple-converted-space"> </span>cfe-commits <<a href="mailto:cfe-commits@lists.llvm.org" style="color: purple; text-decoration: underline;" class="">cfe-commits@lists.llvm.org</a>><br class=""><b class="">Subject:</b><span class="Apple-converted-space"> </span>Re: r313011 - [X86] Lower _mm[256|512]_[mask[z]]_avg_epu[8|16] intrinsics to native llvm IR<o:p class=""></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><o:p class=""> </o:p></div><div class=""><p class="MsoNormal" style="margin: 0cm 0cm 12pt; font-size: 12pt; font-family: "Times New Roman", serif;">Hello Yael,<br class=""><br class="">It looks like this commit broke one of our builders:<br class=""><a href="http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/17121" style="color: purple; text-decoration: underline;" class="">http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/17121</a><br class=""><br class="">. . .<span class="Apple-converted-space"> </span><br class="">Failing Tests (1):<br class=""> Clang :: Modules/builtins.m<br class=""><br class="">Please have a look?<br class=""><br class="">Thanks<br class=""><br class="">Galina<o:p class=""></o:p></p></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class=""><o:p class=""> </o:p></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class="">On Tue, Sep 12, 2017 at 12:46 AM, Yael Tsafrir via cfe-commits <<a href="mailto:cfe-commits@lists.llvm.org" target="_blank" style="color: purple; text-decoration: underline;" class="">cfe-commits@lists.llvm.org</a>> wrote:<o:p class=""></o:p></div><blockquote style="border-style: none none none solid; border-left-width: 1pt; border-left-color: rgb(204, 204, 204); padding: 0cm 0cm 0cm 6pt; margin-left: 4.8pt; margin-right: 0cm;" class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: "Times New Roman", serif;" class="">Author: ytsafrir<br class="">Date: Tue Sep 12 00:46:32 2017<br class="">New Revision: 313011<br class=""><br class="">URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project?rev=313011&view=rev" target="_blank" style="color: purple; text-decoration: underline;" class="">http://llvm.org/viewvc/llvm-project?rev=313011&view=rev</a><br class="">Log:<br class="">[X86] Lower _mm[256|512]_[mask[z]]_avg_epu[8|16] intrinsics to native llvm IR<br class=""><br class="">Differential Revision:<span class="Apple-converted-space"> </span><a href="https://reviews.llvm.org/D37562" target="_blank" style="color: purple; text-decoration: underline;" class="">https://reviews.llvm.org/D37562</a><br class=""><br class="">Modified:<br class=""> cfe/trunk/include/clang/Basic/BuiltinsX86.def<br class=""> cfe/trunk/lib/Headers/avx2intrin.h<br class=""> cfe/trunk/lib/Headers/avx512bwintrin.h<br class=""> cfe/trunk/lib/Headers/emmintrin.h<br class=""> cfe/trunk/test/CodeGen/avx2-builtins.c<br class=""> cfe/trunk/test/CodeGen/avx512bw-builtins.c<br class=""> cfe/trunk/test/CodeGen/avx512vlbw-builtins.c<br class=""> cfe/trunk/test/CodeGen/builtins-x86.c<br class=""> cfe/trunk/test/CodeGen/sse2-builtins.c<br class=""><br class="">Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def<br class="">URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=313011&r1=313010&r2=313011&view=diff" target="_blank" style="color: purple; text-decoration: underline;" class="">http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=313011&r1=313010&r2=313011&view=diff</a><br class="">==============================================================================<br class="">--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)<br class="">+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Tue Sep 12 00:46:32 2017<br class="">@@ -266,8 +266,6 @@ TARGET_BUILTIN(__builtin_ia32_paddusw128<br class=""> TARGET_BUILTIN(__builtin_ia32_psubusb128, "V16cV16cV16c", "", "sse2")<br class=""> TARGET_BUILTIN(__builtin_ia32_psubusw128, "V8sV8sV8s", "", "sse2")<br class=""> TARGET_BUILTIN(__builtin_ia32_pmulhw128, "V8sV8sV8s", "", "sse2")<br class="">-TARGET_BUILTIN(__builtin_ia32_pavgb128, "V16cV16cV16c", "", "sse2")<br class="">-TARGET_BUILTIN(__builtin_ia32_pavgw128, "V8sV8sV8s", "", "sse2")<br class=""> TARGET_BUILTIN(__builtin_ia32_pmaxub128, "V16cV16cV16c", "", "sse2")<br class=""> TARGET_BUILTIN(__builtin_ia32_pmaxsw128, "V8sV8sV8s", "", "sse2")<br class=""> TARGET_BUILTIN(__builtin_ia32_pminub128, "V16cV16cV16c", "", "sse2")<br class="">@@ -522,8 +520,6 @@ TARGET_BUILTIN(__builtin_ia32_paddusw256<br class=""> TARGET_BUILTIN(__builtin_ia32_psubusb256, "V32cV32cV32c", "", "avx2")<br class=""> TARGET_BUILTIN(__builtin_ia32_psubusw256, "V16sV16sV16s", "", "avx2")<br class=""> TARGET_BUILTIN(__builtin_ia32_palignr256, "V32cV32cV32cIi", "", "avx2")<br class="">-TARGET_BUILTIN(__builtin_ia32_pavgb256, "V32cV32cV32c", "", "avx2")<br class="">-TARGET_BUILTIN(__builtin_ia32_pavgw256, "V16sV16sV16s", "", "avx2")<br class=""> TARGET_BUILTIN(__builtin_ia32_pblendvb256, "V32cV32cV32cV32c", "", "avx2")<br class=""> TARGET_BUILTIN(__builtin_ia32_phaddw256, "V16sV16sV16s", "", "avx2")<br class=""> TARGET_BUILTIN(__builtin_ia32_phaddd256, "V8iV8iV8i", "", "avx2")<br class="">@@ -1075,8 +1071,6 @@ TARGET_BUILTIN(__builtin_ia32_paddsb512_<br class=""> TARGET_BUILTIN(__builtin_ia32_paddsw512_mask, "V32sV32sV32sV32sUi", "", "avx512bw")<br class=""> TARGET_BUILTIN(__builtin_ia32_paddusb512_mask, "V64cV64cV64cV64cULLi", "", "avx512bw")<br class=""> TARGET_BUILTIN(__builtin_ia32_paddusw512_mask, "V32sV32sV32sV32sUi", "", "avx512bw")<br class="">-TARGET_BUILTIN(__builtin_ia32_pavgb512_mask, "V64cV64cV64cV64cULLi", "", "avx512bw")<br class="">-TARGET_BUILTIN(__builtin_ia32_pavgw512_mask, "V32sV32sV32sV32sUi", "", "avx512bw")<br class=""> TARGET_BUILTIN(__builtin_ia32_pmaxsb512_mask, "V64cV64cV64cV64cULLi", "", "avx512bw")<br class=""> TARGET_BUILTIN(__builtin_ia32_pmaxsw512_mask, "V32sV32sV32sV32sUi", "", "avx512bw")<br class=""> TARGET_BUILTIN(__builtin_ia32_pmaxub512_mask, "V64cV64cV64cV64cULLi", "", "avx512bw")<br class=""><br class="">Modified: cfe/trunk/lib/Headers/avx2intrin.h<br class="">URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx2intrin.h?rev=313011&r1=313010&r2=313011&view=diff" target="_blank" style="color: purple; text-decoration: underline;" class="">http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx2intrin.h?rev=313011&r1=313010&r2=313011&view=diff</a><br class="">==============================================================================<br class="">--- cfe/trunk/lib/Headers/avx2intrin.h (original)<br class="">+++ cfe/trunk/lib/Headers/avx2intrin.h Tue Sep 12 00:46:32 2017<br class="">@@ -145,13 +145,21 @@ _mm256_andnot_si256(__m256i __a, __m256i<br class=""> static __inline__ __m256i __DEFAULT_FN_ATTRS<br class=""> _mm256_avg_epu8(__m256i __a, __m256i __b)<br class=""> {<br class="">- return (__m256i)__builtin_ia32_pavgb256((__v32qi)__a, (__v32qi)__b);<br class="">+ typedef unsigned short __v32hu __attribute__((__vector_size__(64)));<br class="">+ return (__m256i)__builtin_convertvector(<br class="">+ ((__builtin_convertvector((__v32qu)__a, __v32hu) +<br class="">+ __builtin_convertvector((__v32qu)__b, __v32hu)) + 1)<br class="">+ >> 1, __v32qu);<br class=""> }<br class=""><br class=""> static __inline__ __m256i __DEFAULT_FN_ATTRS<br class=""> _mm256_avg_epu16(__m256i __a, __m256i __b)<br class=""> {<br class="">- return (__m256i)__builtin_ia32_pavgw256((__v16hi)__a, (__v16hi)__b);<br class="">+ typedef unsigned int __v16su __attribute__((__vector_size__(64)));<br class="">+ return (__m256i)__builtin_convertvector(<br class="">+ ((__builtin_convertvector((__v16hu)__a, __v16su) +<br class="">+ __builtin_convertvector((__v16hu)__b, __v16su)) + 1)<br class="">+ >> 1, __v16hu);<br class=""> }<br class=""><br class=""> static __inline__ __m256i __DEFAULT_FN_ATTRS<br class=""><br class="">Modified: cfe/trunk/lib/Headers/avx512bwintrin.h<br class="">URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512bwintrin.h?rev=313011&r1=313010&r2=313011&view=diff" target="_blank" style="color: purple; text-decoration: underline;" class="">http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512bwintrin.h?rev=313011&r1=313010&r2=313011&view=diff</a><br class="">==============================================================================<br class="">--- cfe/trunk/lib/Headers/avx512bwintrin.h (original)<br class="">+++ cfe/trunk/lib/Headers/avx512bwintrin.h Tue Sep 12 00:46:32 2017<br class="">@@ -706,57 +706,55 @@ _mm512_maskz_adds_epu16 (__mmask32 __U,<br class=""> static __inline__ __m512i __DEFAULT_FN_ATTRS<br class=""> _mm512_avg_epu8 (__m512i __A, __m512i __B)<br class=""> {<br class="">- return (__m512i) __builtin_ia32_pavgb512_mask ((__v64qi) __A,<br class="">- (__v64qi) __B,<br class="">- (__v64qi) _mm512_setzero_qi(),<br class="">- (__mmask64) -1);<br class="">+ typedef unsigned short __v64hu __attribute__((__vector_size__(128)));<br class="">+ return (__m512i)__builtin_convertvector(<br class="">+ ((__builtin_convertvector((__v64qu) __A, __v64hu) +<br class="">+ __builtin_convertvector((__v64qu) __B, __v64hu)) + 1)<br class="">+ >> 1, __v64qu);<br class=""> }<br class=""><br class=""> static __inline__ __m512i __DEFAULT_FN_ATTRS<br class=""> _mm512_mask_avg_epu8 (__m512i __W, __mmask64 __U, __m512i __A,<br class=""> __m512i __B)<br class=""> {<br class="">- return (__m512i) __builtin_ia32_pavgb512_mask ((__v64qi) __A,<br class="">- (__v64qi) __B,<br class="">- (__v64qi) __W,<br class="">- (__mmask64) __U);<br class="">+ return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,<br class="">+ (__v64qi)_mm512_avg_epu8(__A, __B),<br class="">+ (__v64qi)__W);<br class=""> }<br class=""><br class=""> static __inline__ __m512i __DEFAULT_FN_ATTRS<br class=""> _mm512_maskz_avg_epu8 (__mmask64 __U, __m512i __A, __m512i __B)<br class=""> {<br class="">- return (__m512i) __builtin_ia32_pavgb512_mask ((__v64qi) __A,<br class="">- (__v64qi) __B,<br class="">- (__v64qi) _mm512_setzero_qi(),<br class="">- (__mmask64) __U);<br class="">+ return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,<br class="">+ (__v64qi)_mm512_avg_epu8(__A, __B),<br class="">+ (__v64qi)_mm512_setzero_qi());<br class=""> }<br class=""><br class=""> static __inline__ __m512i __DEFAULT_FN_ATTRS<br class=""> _mm512_avg_epu16 (__m512i __A, __m512i __B)<br class=""> {<br class="">- return (__m512i) __builtin_ia32_pavgw512_mask ((__v32hi) __A,<br class="">- (__v32hi) __B,<br class="">- (__v32hi) _mm512_setzero_hi(),<br class="">- (__mmask32) -1);<br class="">+ typedef unsigned int __v32su __attribute__((__vector_size__(128)));<br class="">+ return (__m512i)__builtin_convertvector(<br class="">+ ((__builtin_convertvector((__v32hu) __A, __v32su) +<br class="">+ __builtin_convertvector((__v32hu) __B, __v32su)) + 1)<br class="">+ >> 1, __v32hu);<br class=""> }<br class=""><br class=""> static __inline__ __m512i __DEFAULT_FN_ATTRS<br class=""> _mm512_mask_avg_epu16 (__m512i __W, __mmask32 __U, __m512i __A,<br class=""> __m512i __B)<br class=""> {<br class="">- return (__m512i) __builtin_ia32_pavgw512_mask ((__v32hi) __A,<br class="">- (__v32hi) __B,<br class="">- (__v32hi) __W,<br class="">- (__mmask32) __U);<br class="">+ return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,<br class="">+ (__v32hi)_mm512_avg_epu16(__A, __B),<br class="">+ (__v32hi)__W);<br class=""> }<br class=""><br class=""> static __inline__ __m512i __DEFAULT_FN_ATTRS<br class=""> _mm512_maskz_avg_epu16 (__mmask32 __U, __m512i __A, __m512i __B)<br class=""> {<br class="">- return (__m512i) __builtin_ia32_pavgw512_mask ((__v32hi) __A,<br class="">- (__v32hi) __B,<br class="">- (__v32hi) _mm512_setzero_hi(),<br class="">- (__mmask32) __U);<br class="">+ return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,<br class="">+ (__v32hi)_mm512_avg_epu16(__A, __B),<br class="">+ (__v32hi) _mm512_setzero_hi());<br class=""> }<br class=""><br class=""> static __inline__ __m512i __DEFAULT_FN_ATTRS<br class=""><br class="">Modified: cfe/trunk/lib/Headers/emmintrin.h<br class="">URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/emmintrin.h?rev=313011&r1=313010&r2=313011&view=diff" target="_blank" style="color: purple; text-decoration: underline;" class="">http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/emmintrin.h?rev=313011&r1=313010&r2=313011&view=diff</a><br class="">==============================================================================<br class="">--- cfe/trunk/lib/Headers/emmintrin.h (original)<br class="">+++ cfe/trunk/lib/Headers/emmintrin.h Tue Sep 12 00:46:32 2017<br class="">@@ -2258,7 +2258,11 @@ _mm_adds_epu16(__m128i __a, __m128i __b)<br class=""> static __inline__ __m128i __DEFAULT_FN_ATTRS<br class=""> _mm_avg_epu8(__m128i __a, __m128i __b)<br class=""> {<br class="">- return (__m128i)__builtin_ia32_pavgb128((__v16qi)__a, (__v16qi)__b);<br class="">+ typedef unsigned short __v16hu __attribute__ ((__vector_size__ (32)));<br class="">+ return (__m128i)__builtin_convertvector(<br class="">+ ((__builtin_convertvector((__v16qu)__a, __v16hu) +<br class="">+ __builtin_convertvector((__v16qu)__b, __v16hu)) + 1)<br class="">+ >> 1, __v16qu);<br class=""> }<br class=""><br class=""> /// \brief Computes the rounded avarages of corresponding elements of two<br class="">@@ -2278,7 +2282,11 @@ _mm_avg_epu8(__m128i __a, __m128i __b)<br class=""> static __inline__ __m128i __DEFAULT_FN_ATTRS<br class=""> _mm_avg_epu16(__m128i __a, __m128i __b)<br class=""> {<br class="">- return (__m128i)__builtin_ia32_pavgw128((__v8hi)__a, (__v8hi)__b);<br class="">+ typedef unsigned int __v8su __attribute__ ((__vector_size__ (32)));<br class="">+ return (__m128i)__builtin_convertvector(<br class="">+ ((__builtin_convertvector((__v8hu)__a, __v8su) +<br class="">+ __builtin_convertvector((__v8hu)__b, __v8su)) + 1)<br class="">+ >> 1, __v8hu);<br class=""> }<br class=""><br class=""> /// \brief Multiplies the corresponding elements of two 128-bit signed [8 x i16]<br class=""><br class="">Modified: cfe/trunk/test/CodeGen/avx2-builtins.c<br class="">URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx2-builtins.c?rev=313011&r1=313010&r2=313011&view=diff" target="_blank" style="color: purple; text-decoration: underline;" class="">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx2-builtins.c?rev=313011&r1=313010&r2=313011&view=diff</a><br class="">==============================================================================<br class="">--- cfe/trunk/test/CodeGen/avx2-builtins.c (original)<br class="">+++ cfe/trunk/test/CodeGen/avx2-builtins.c Tue Sep 12 00:46:32 2017<br class="">@@ -99,13 +99,25 @@ __m256i test_mm256_andnot_si256(__m256i<br class=""><br class=""> __m256i test_mm256_avg_epu8(__m256i a, __m256i b) {<br class=""> // CHECK-LABEL: test_mm256_avg_epu8<br class="">- // CHECK: call <32 x i8> @llvm.x86.avx2.pavg.b(<32 x i8> %{{.*}}, <32 x i8> %{{.*}})<br class="">+ // CHECK-NOT: call <32 x i8> @llvm.x86.avx2.pavg.b(<32 x i8> %{{.*}}, <32 x i8> %{{.*}})<br class="">+ // CHECK: zext <32 x i8> %{{.*}} to <32 x i16><br class="">+ // CHECK: zext <32 x i8> %{{.*}} to <32 x i16><br class="">+ // CHECK: add <32 x i16> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <32 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: lshr <32 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: trunc <32 x i16> %{{.*}} to <32 x i8><br class=""> return _mm256_avg_epu8(a, b);<br class=""> }<br class=""><br class=""> __m256i test_mm256_avg_epu16(__m256i a, __m256i b) {<br class=""> // CHECK-LABEL: test_mm256_avg_epu16<br class="">- // CHECK: call <16 x i16> @llvm.x86.avx2.pavg.w(<16 x i16> %{{.*}}, <16 x i16> %{{.*}})<br class="">+ // CHECK-NOT: call <16 x i16> @llvm.x86.avx2.pavg.w(<16 x i16> %{{.*}}, <16 x i16> %{{.*}})<br class="">+ // CHECK: zext <16 x i16> %{{.*}} to <16 x i32><br class="">+ // CHECK: zext <16 x i16> %{{.*}} to <16 x i32><br class="">+ // CHECK: add <16 x i32> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <16 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: lshr <16 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: trunc <16 x i32> %{{.*}} to <16 x i16><br class=""> return _mm256_avg_epu16(a, b);<br class=""> }<br class=""><br class=""><br class="">Modified: cfe/trunk/test/CodeGen/avx512bw-builtins.c<br class="">URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512bw-builtins.c?rev=313011&r1=313010&r2=313011&view=diff" target="_blank" style="color: purple; text-decoration: underline;" class="">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512bw-builtins.c?rev=313011&r1=313010&r2=313011&view=diff</a><br class="">==============================================================================<br class="">--- cfe/trunk/test/CodeGen/avx512bw-builtins.c (original)<br class="">+++ cfe/trunk/test/CodeGen/avx512bw-builtins.c Tue Sep 12 00:46:32 2017<br class="">@@ -638,32 +638,74 @@ __m512i test_mm512_maskz_adds_epu16(__mm<br class=""> }<br class=""> __m512i test_mm512_avg_epu8(__m512i __A, __m512i __B) {<br class=""> // CHECK-LABEL: @test_mm512_avg_epu8<br class="">- // CHECK: @llvm.x86.avx512.mask.pavg.b.512<br class="">+ // CHECK-NOT: @llvm.x86.avx512.mask.pavg.b.512<br class="">+ // CHECK: zext <64 x i8> %{{.*}} to <64 x i16><br class="">+ // CHECK: zext <64 x i8> %{{.*}} to <64 x i16><br class="">+ // CHECK: add <64 x i16> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <64 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: lshr <64 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: trunc <64 x i16> %{{.*}} to <64 x i8><br class=""> return _mm512_avg_epu8(__A,__B);<br class=""> }<br class=""> __m512i test_mm512_mask_avg_epu8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {<br class=""> // CHECK-LABEL: @test_mm512_mask_avg_epu8<br class="">- // CHECK: @llvm.x86.avx512.mask.pavg.b.512<br class="">+ // CHECK-NOT: @llvm.x86.avx512.mask.pavg.b.512<br class="">+ // CHECK: zext <64 x i8> %{{.*}} to <64 x i16><br class="">+ // CHECK: zext <64 x i8> %{{.*}} to <64 x i16><br class="">+ // CHECK: add <64 x i16> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <64 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: lshr <64 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: trunc <64 x i16> %{{.*}} to <64 x i8><br class="">+ // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}}<br class=""> return _mm512_mask_avg_epu8(__W,__U,__A,__B);<br class=""> }<br class=""> __m512i test_mm512_maskz_avg_epu8(__mmask64 __U, __m512i __A, __m512i __B) {<br class=""> // CHECK-LABEL: @test_mm512_maskz_avg_epu8<br class="">- // CHECK: @llvm.x86.avx512.mask.pavg.b.512<br class="">+ // CHECK-NOT: @llvm.x86.avx512.mask.pavg.b.512<br class="">+ // CHECK: zext <64 x i8> %{{.*}} to <64 x i16><br class="">+ // CHECK: zext <64 x i8> %{{.*}} to <64 x i16><br class="">+ // CHECK: add <64 x i16> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <64 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: lshr <64 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: trunc <64 x i16> %{{.*}} to <64 x i8><br class="">+ // CHECK: store <64 x i8> zeroinitializer<br class="">+ // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}}<br class=""> return _mm512_maskz_avg_epu8(__U,__A,__B);<br class=""> }<br class=""> __m512i test_mm512_avg_epu16(__m512i __A, __m512i __B) {<br class=""> // CHECK-LABEL: @test_mm512_avg_epu16<br class="">- // CHECK: @llvm.x86.avx512.mask.pavg.w.512<br class="">+ // CHECK-NOT: @llvm.x86.avx512.mask.pavg.w.512<br class="">+ // CHECK: zext <32 x i16> %{{.*}} to <32 x i32><br class="">+ // CHECK: zext <32 x i16> %{{.*}} to <32 x i32><br class="">+ // CHECK: add <32 x i32> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <32 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: lshr <32 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: trunc <32 x i32> %{{.*}} to <32 x i16><br class=""> return _mm512_avg_epu16(__A,__B);<br class=""> }<br class=""> __m512i test_mm512_mask_avg_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {<br class=""> // CHECK-LABEL: @test_mm512_mask_avg_epu16<br class="">- // CHECK: @llvm.x86.avx512.mask.pavg.w.512<br class="">+ // CHECK-NOT: @llvm.x86.avx512.mask.pavg.w.512<br class="">+ // CHECK: zext <32 x i16> %{{.*}} to <32 x i32><br class="">+ // CHECK: zext <32 x i16> %{{.*}} to <32 x i32><br class="">+ // CHECK: add <32 x i32> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <32 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: lshr <32 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: trunc <32 x i32> %{{.*}} to <32 x i16><br class="">+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}<br class=""> return _mm512_mask_avg_epu16(__W,__U,__A,__B);<br class=""> }<br class=""> __m512i test_mm512_maskz_avg_epu16(__mmask32 __U, __m512i __A, __m512i __B) {<br class=""> // CHECK-LABEL: @test_mm512_maskz_avg_epu16<br class="">- // CHECK: @llvm.x86.avx512.mask.pavg.w.512<br class="">+ // CHECK-NOT: @llvm.x86.avx512.mask.pavg.w.512<br class="">+ // CHECK: zext <32 x i16> %{{.*}} to <32 x i32><br class="">+ // CHECK: zext <32 x i16> %{{.*}} to <32 x i32><br class="">+ // CHECK: add <32 x i32> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <32 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: lshr <32 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: trunc <32 x i32> %{{.*}} to <32 x i16><br class="">+ // CHECK: store <32 x i16> zeroinitializer<br class="">+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}<br class=""> return _mm512_maskz_avg_epu16(__U,__A,__B);<br class=""> }<br class=""> __m512i test_mm512_max_epi8(__m512i __A, __m512i __B) {<br class=""><br class="">Modified: cfe/trunk/test/CodeGen/avx512vlbw-builtins.c<br class="">URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vlbw-builtins.c?rev=313011&r1=313010&r2=313011&view=diff" target="_blank" style="color: purple; text-decoration: underline;" class="">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vlbw-builtins.c?rev=313011&r1=313010&r2=313011&view=diff</a><br class="">==============================================================================<br class="">--- cfe/trunk/test/CodeGen/avx512vlbw-builtins.c (original)<br class="">+++ cfe/trunk/test/CodeGen/avx512vlbw-builtins.c Tue Sep 12 00:46:32 2017<br class="">@@ -1155,49 +1155,101 @@ __m256i test_mm256_maskz_adds_epu16(__mm<br class=""> }<br class=""> __m128i test_mm_mask_avg_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {<br class=""> // CHECK-LABEL: @test_mm_mask_avg_epu8<br class="">- // CHECK: @llvm.x86.sse2.pavg.b<br class="">+ // CHECK-NOT: @llvm.x86.sse2.pavg.b<br class="">+ // CHECK: zext <16 x i8> %{{.*}} to <16 x i16><br class="">+ // CHECK: zext <16 x i8> %{{.*}} to <16 x i16><br class="">+ // CHECK: add <16 x i16> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <16 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: lshr <16 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: trunc <16 x i16> %{{.*}} to <16 x i8><br class=""> // CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}<br class=""> return _mm_mask_avg_epu8(__W,__U,__A,__B);<br class=""> }<br class=""> __m128i test_mm_maskz_avg_epu8(__mmask16 __U, __m128i __A, __m128i __B) {<br class=""> // CHECK-LABEL: @test_mm_maskz_avg_epu8<br class="">- // CHECK: @llvm.x86.sse2.pavg.b<br class="">+ // CHECK-NOT: @llvm.x86.sse2.pavg.b<br class="">+ // CHECK: zext <16 x i8> %{{.*}} to <16 x i16><br class="">+ // CHECK: zext <16 x i8> %{{.*}} to <16 x i16><br class="">+ // CHECK: add <16 x i16> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <16 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: lshr <16 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: trunc <16 x i16> %{{.*}} to <16 x i8><br class="">+ // CHECK: store <2 x i64> zeroinitializer<br class=""> // CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}<br class=""> return _mm_maskz_avg_epu8(__U,__A,__B);<br class=""> }<br class=""> __m256i test_mm256_mask_avg_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {<br class=""> // CHECK-LABEL: @test_mm256_mask_avg_epu8<br class="">- // CHECK: @llvm.x86.avx2.pavg.b<br class="">+ // CHECK-NOT: @llvm.x86.avx2.pavg.b<br class="">+ // CHECK: zext <32 x i8> %{{.*}} to <32 x i16><br class="">+ // CHECK: zext <32 x i8> %{{.*}} to <32 x i16><br class="">+ // CHECK: add <32 x i16> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <32 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: lshr <32 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: trunc <32 x i16> %{{.*}} to <32 x i8><br class=""> // CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}<br class=""> return _mm256_mask_avg_epu8(__W,__U,__A,__B);<br class=""> }<br class=""> __m256i test_mm256_maskz_avg_epu8(__mmask32 __U, __m256i __A, __m256i __B) {<br class=""> // CHECK-LABEL: @test_mm256_maskz_avg_epu8<br class="">- // CHECK: @llvm.x86.avx2.pavg.b<br class="">+ // CHECK-NOT: @llvm.x86.avx2.pavg.b<br class="">+ // CHECK: zext <32 x i8> %{{.*}} to <32 x i16><br class="">+ // CHECK: zext <32 x i8> %{{.*}} to <32 x i16><br class="">+ // CHECK: add <32 x i16> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <32 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: lshr <32 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: trunc <32 x i16> %{{.*}} to <32 x i8><br class="">+ // CHECK: store <4 x i64> zeroinitializer<br class=""> // CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}<br class=""> return _mm256_maskz_avg_epu8(__U,__A,__B);<br class=""> }<br class=""> __m128i test_mm_mask_avg_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {<br class=""> // CHECK-LABEL: @test_mm_mask_avg_epu16<br class="">- // CHECK: @llvm.x86.sse2.pavg.w<br class="">+ // CHECK-NOT: @llvm.x86.sse2.pavg.w<br class="">+ // CHECK: zext <8 x i16> %{{.*}} to <8 x i32><br class="">+ // CHECK: zext <8 x i16> %{{.*}} to <8 x i32><br class="">+ // CHECK: add <8 x i32> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <8 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: lshr <8 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: trunc <8 x i32> %{{.*}} to <8 x i16><br class=""> // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}<br class=""> return _mm_mask_avg_epu16(__W,__U,__A,__B);<br class=""> }<br class=""> __m128i test_mm_maskz_avg_epu16(__mmask8 __U, __m128i __A, __m128i __B) {<br class=""> // CHECK-LABEL: @test_mm_maskz_avg_epu16<br class="">- // CHECK: @llvm.x86.sse2.pavg.w<br class="">+ // CHECK-NOT: @llvm.x86.sse2.pavg.w<br class="">+ // CHECK: zext <8 x i16> %{{.*}} to <8 x i32><br class="">+ // CHECK: zext <8 x i16> %{{.*}} to <8 x i32><br class="">+ // CHECK: add <8 x i32> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <8 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: lshr <8 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: trunc <8 x i32> %{{.*}} to <8 x i16><br class="">+ // CHECK: store <2 x i64> zeroinitializer<br class=""> // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}<br class=""> return _mm_maskz_avg_epu16(__U,__A,__B);<br class=""> }<br class=""> __m256i test_mm256_mask_avg_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {<br class=""> // CHECK-LABEL: @test_mm256_mask_avg_epu16<br class="">- // CHECK: @llvm.x86.avx2.pavg.w<br class="">+ // CHECK-NOT: @llvm.x86.avx2.pavg.w<br class="">+ // CHECK: zext <16 x i16> %{{.*}} to <16 x i32><br class="">+ // CHECK: zext <16 x i16> %{{.*}} to <16 x i32><br class="">+ // CHECK: add <16 x i32> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <16 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: lshr <16 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: trunc <16 x i32> %{{.*}} to <16 x i16><br class=""> // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}<br class=""> return _mm256_mask_avg_epu16(__W,__U,__A,__B);<br class=""> }<br class=""> __m256i test_mm256_maskz_avg_epu16(__mmask16 __U, __m256i __A, __m256i __B) {<br class=""> // CHECK-LABEL: @test_mm256_maskz_avg_epu16<br class="">- // CHECK: @llvm.x86.avx2.pavg.w<br class="">+ // CHECK-NOT: @llvm.x86.avx2.pavg.w<br class="">+ // CHECK: zext <16 x i16> %{{.*}} to <16 x i32><br class="">+ // CHECK: zext <16 x i16> %{{.*}} to <16 x i32><br class="">+ // CHECK: add <16 x i32> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <16 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: lshr <16 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: trunc <16 x i32> %{{.*}} to <16 x i16><br class="">+ // CHECK: store <4 x i64> zeroinitializer<br class=""> // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}<br class=""> return _mm256_maskz_avg_epu16(__U,__A,__B);<br class=""> }<br class=""><br class="">Modified: cfe/trunk/test/CodeGen/builtins-x86.c<br class="">URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-x86.c?rev=313011&r1=313010&r2=313011&view=diff" target="_blank" style="color: purple; text-decoration: underline;" class="">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-x86.c?rev=313011&r1=313010&r2=313011&view=diff</a><br class="">==============================================================================<br class="">--- cfe/trunk/test/CodeGen/builtins-x86.c (original)<br class="">+++ cfe/trunk/test/CodeGen/builtins-x86.c Tue Sep 12 00:46:32 2017<br class="">@@ -160,8 +160,6 @@ void f0() {<br class=""> tmp_V4s = __builtin_ia32_psubusw(tmp_V4s, tmp_V4s);<br class=""> tmp_V4s = __builtin_ia32_pmulhw(tmp_V4s, tmp_V4s);<br class=""> tmp_V4s = __builtin_ia32_pmulhuw(tmp_V4s, tmp_V4s);<br class="">- tmp_V8c = __builtin_ia32_pavgb(tmp_V8c, tmp_V8c);<br class="">- tmp_V4s = __builtin_ia32_pavgw(tmp_V4s, tmp_V4s);<br class=""> tmp_V8c = __builtin_ia32_pcmpeqb(tmp_V8c, tmp_V8c);<br class=""> tmp_V4s = __builtin_ia32_pcmpeqw(tmp_V4s, tmp_V4s);<br class=""> tmp_V2i = __builtin_ia32_pcmpeqd(tmp_V2i, tmp_V2i);<br class="">@@ -201,8 +199,6 @@ void f0() {<br class=""> tmp_V16c = __builtin_ia32_psubusb128(tmp_V16c, tmp_V16c);<br class=""> tmp_V8s = __builtin_ia32_psubusw128(tmp_V8s, tmp_V8s);<br class=""> tmp_V8s = __builtin_ia32_pmulhw128(tmp_V8s, tmp_V8s);<br class="">- tmp_V16c = __builtin_ia32_pavgb128(tmp_V16c, tmp_V16c);<br class="">- tmp_V8s = __builtin_ia32_pavgw128(tmp_V8s, tmp_V8s);<br class=""> tmp_V16c = __builtin_ia32_pmaxub128(tmp_V16c, tmp_V16c);<br class=""> tmp_V8s = __builtin_ia32_pmaxsw128(tmp_V8s, tmp_V8s);<br class=""> tmp_V16c = __builtin_ia32_pminub128(tmp_V16c, tmp_V16c);<br class=""><br class="">Modified: cfe/trunk/test/CodeGen/sse2-builtins.c<br class="">URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/sse2-builtins.c?rev=313011&r1=313010&r2=313011&view=diff" target="_blank" style="color: purple; text-decoration: underline;" class="">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/sse2-builtins.c?rev=313011&r1=313010&r2=313011&view=diff</a><br class="">==============================================================================<br class="">--- cfe/trunk/test/CodeGen/sse2-builtins.c (original)<br class="">+++ cfe/trunk/test/CodeGen/sse2-builtins.c Tue Sep 12 00:46:32 2017<br class="">@@ -97,13 +97,25 @@ __m128i test_mm_andnot_si128(__m128i A,<br class=""><br class=""> __m128i test_mm_avg_epu8(__m128i A, __m128i B) {<br class=""> // CHECK-LABEL: test_mm_avg_epu8<br class="">- // CHECK: call <16 x i8> @llvm.x86.sse2.pavg.b(<16 x i8> %{{.*}}, <16 x i8> %{{.*}})<br class="">+ // CHECK-NOT: call <16 x i8> @llvm.x86.sse2.pavg.b(<16 x i8> %{{.*}}, <16 x i8> %{{.*}})<br class="">+ // CHECK: zext <16 x i8> %{{.*}} to <16 x i16><br class="">+ // CHECK: zext <16 x i8> %{{.*}} to <16 x i16><br class="">+ // CHECK: add <16 x i16> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <16 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK: lshr <16 x i16> %{{.*}}, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1><br class="">+ // CHECK:trunc <16 x i16> %{{.*}} to <16 x i8><br class=""> return _mm_avg_epu8(A, B);<br class=""> }<br class=""><br class=""> __m128i test_mm_avg_epu16(__m128i A, __m128i B) {<br class=""> // CHECK-LABEL: test_mm_avg_epu16<br class="">- // CHECK: call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %{{.*}}, <8 x i16> %{{.*}})<br class="">+ // CHECK-NOT: call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %{{.*}}, <8 x i16> %{{.*}})<br class="">+ // CHECK: zext <8 x i16> %{{.*}} to <8 x i32><br class="">+ // CHECK: zext <8 x i16> %{{.*}} to <8 x i32><br class="">+ // CHECK: add <8 x i32> %{{.*}}, %{{.*}}<br class="">+ // CHECK: add <8 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: lshr <8 x i32> %{{.*}}, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1><br class="">+ // CHECK: trunc <8 x i32> %{{.*}} to <8 x i16><br class=""> return _mm_avg_epu16(A, B);<br class=""> }<br class=""><br class=""><br class=""><br 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