<div dir="ltr">Actually I was thinking of more like static-init-wasm.cpp - which seemed to have the attribute list numbers hardcoded & presumably isn't checking/caring about them.<br><br>But also, looking closer - I'm guessing a bunch of other tests that got the -disable-O0-optnone treatment were because of similar overly-constrained tests? I assume they don't actually need this feature disabled, do they? (is there much need in general for a flag to disable this functionality?)</div><br><div class="gmail_quote"><div dir="ltr">On Mon, May 29, 2017 at 11:48 AM Mehdi AMINI <<a href="mailto:joker.eph@gmail.com">joker.eph@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">You mean things like cfe/trunk/test/CodeGenOpenCL/<a href="http://amdgpu-attrs.cl" target="_blank">amdgpu-attrs.cl</a> ? <div>Right it seems that using .* would be fine before matching the amdgpu specific attributes.</div><div><br></div><div>CC: Matt.</div></div><div dir="ltr"><div><br></div><div>-- </div><div>Mehdi</div></div><div dir="ltr"><div class="gmail_extra"><br><div class="gmail_quote">2017-05-29 11:14 GMT-07:00 David Blaikie <span dir="ltr"><<a href="mailto:dblaikie@gmail.com" target="_blank">dblaikie@gmail.com</a>></span>:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">I'm assuming  most of these tests aren't actually testing for attributes - perhaps it'd be better to remove their dependence on a particular attribute list number so future changes to attributes don't require so many touches?</div><div class="m_-3684326615574561011m_5577694628464927519HOEnZb"><div class="m_-3684326615574561011m_5577694628464927519h5"><br><div class="gmail_quote"><div dir="ltr">On Sun, May 28, 2017 at 10:38 PM Mehdi Amini via cfe-commits <<a href="mailto:cfe-commits@lists.llvm.org" target="_blank">cfe-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: mehdi_amini<br>
Date: Mon May 29 00:38:20 2017<br>
New Revision: 304127<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=304127&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=304127&view=rev</a><br>
Log:<br>
IRGen: Add optnone attribute on function during O0<br>
<br>
Amongst other, this will help LTO to correctly handle/honor files<br>
compiled with O0, helping debugging failures.<br>
It also seems in line with how we handle other options, like how<br>
-fnoinline adds the appropriate attribute as well.<br>
<br>
Differential Revision: <a href="https://reviews.llvm.org/D28404" rel="noreferrer" target="_blank">https://reviews.llvm.org/D28404</a><br>
<br>
Modified:<br>
    cfe/trunk/include/clang/Driver/CC1Options.td<br>
    cfe/trunk/include/clang/Frontend/CodeGenOptions.def<br>
    cfe/trunk/lib/CodeGen/CGOpenMPRuntime.cpp<br>
    cfe/trunk/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp<br>
    cfe/trunk/lib/CodeGen/CodeGenModule.cpp<br>
    cfe/trunk/lib/Frontend/CompilerInvocation.cpp<br>
    cfe/trunk/test/CodeGen/aarch64-neon-2velem.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-3v.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-across.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-extract.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-fcvt-intrinsics.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-fma.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-ldst-one.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-misc.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-perm.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-scalar-copy.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-shifts.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-tbl.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-vcombine.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-vget-hilo.c<br>
    cfe/trunk/test/CodeGen/aarch64-neon-vget.c<br>
    cfe/trunk/test/CodeGen/aarch64-poly128.c<br>
    cfe/trunk/test/CodeGen/aarch64-poly64.c<br>
    cfe/trunk/test/CodeGen/address-safety-attr-kasan.cpp<br>
    cfe/trunk/test/CodeGen/address-safety-attr.cpp<br>
    cfe/trunk/test/CodeGen/arm-crc32.c<br>
    cfe/trunk/test/CodeGen/arm-neon-directed-rounding.c<br>
    cfe/trunk/test/CodeGen/arm-neon-fma.c<br>
    cfe/trunk/test/CodeGen/arm-neon-numeric-maxmin.c<br>
    cfe/trunk/test/CodeGen/arm-neon-shifts.c<br>
    cfe/trunk/test/CodeGen/arm-neon-vcvtX.c<br>
    cfe/trunk/test/CodeGen/arm-neon-vget.c<br>
    cfe/trunk/test/CodeGen/arm64-crc32.c<br>
    cfe/trunk/test/CodeGen/arm64-lanes.c<br>
    cfe/trunk/test/CodeGen/arm64_vcopy.c<br>
    cfe/trunk/test/CodeGen/arm64_vdupq_n_f64.c<br>
    cfe/trunk/test/CodeGen/attr-coldhot.c<br>
    cfe/trunk/test/CodeGen/attr-naked.c<br>
    cfe/trunk/test/CodeGen/builtins-arm-exclusive.c<br>
    cfe/trunk/test/CodeGen/builtins-arm.c<br>
    cfe/trunk/test/CodeGen/builtins-arm64.c<br>
    cfe/trunk/test/CodeGen/noduplicate-cxx11-test.cpp<br>
    cfe/trunk/test/CodeGen/pragma-weak.c<br>
    cfe/trunk/test/CodeGen/unwind-attr.c<br>
    cfe/trunk/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp<br>
    cfe/trunk/test/CodeGenCXX/apple-kext-no-staticinit-section.cpp<br>
    cfe/trunk/test/CodeGenCXX/debug-info-global-ctor-dtor.cpp<br>
    cfe/trunk/test/CodeGenCXX/optnone-templates.cpp<br>
    cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp<br>
    cfe/trunk/test/CodeGenCXX/thunks.cpp<br>
    cfe/trunk/test/CodeGenObjC/gnu-exceptions.m<br>
    cfe/trunk/test/CodeGenOpenCL/<a href="http://amdgpu-attrs.cl" rel="noreferrer" target="_blank">amdgpu-attrs.cl</a><br>
    cfe/trunk/test/Driver/darwin-iphone-defaults.m<br>
<br>
Modified: cfe/trunk/include/clang/Driver/CC1Options.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/CC1Options.td?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/CC1Options.td?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/include/clang/Driver/CC1Options.td (original)<br>
+++ cfe/trunk/include/clang/Driver/CC1Options.td Mon May 29 00:38:20 2017<br>
@@ -172,6 +172,8 @@ def disable_llvm_optzns : Flag<["-"], "d<br>
 def disable_lifetimemarkers : Flag<["-"], "disable-lifetime-markers">,<br>
   HelpText<"Disable lifetime-markers emission even when optimizations are "<br>
            "enabled">;<br>
+def disable_O0_optnone : Flag<["-"], "disable-O0-optnone">,<br>
+  HelpText<"Disable adding the optnone attribute to functions at O0">;<br>
 def disable_red_zone : Flag<["-"], "disable-red-zone">,<br>
   HelpText<"Do not emit code that uses the red zone.">;<br>
 def dwarf_column_info : Flag<["-"], "dwarf-column-info">,<br>
<br>
Modified: cfe/trunk/include/clang/Frontend/CodeGenOptions.def<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Frontend/CodeGenOptions.def?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Frontend/CodeGenOptions.def?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/include/clang/Frontend/CodeGenOptions.def (original)<br>
+++ cfe/trunk/include/clang/Frontend/CodeGenOptions.def Mon May 29 00:38:20 2017<br>
@@ -53,6 +53,7 @@ CODEGENOPT(DisableLLVMPasses , 1, 0) ///<br>
                                      ///< the pristine IR generated by the<br>
                                      ///< frontend.<br>
 CODEGENOPT(DisableLifetimeMarkers, 1, 0) ///< Don't emit any lifetime markers<br>
+CODEGENOPT(DisableO0ImplyOptNone , 1, 0) ///< Don't annonate function with optnone at O0<br>
 CODEGENOPT(ExperimentalNewPassManager, 1, 0) ///< Enables the new, experimental<br>
                                              ///< pass manager.<br>
 CODEGENOPT(DisableRedZone    , 1, 0) ///< Set when -mno-red-zone is enabled.<br>
<br>
Modified: cfe/trunk/lib/CodeGen/CGOpenMPRuntime.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGOpenMPRuntime.cpp?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGOpenMPRuntime.cpp?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/lib/CodeGen/CGOpenMPRuntime.cpp (original)<br>
+++ cfe/trunk/lib/CodeGen/CGOpenMPRuntime.cpp Mon May 29 00:38:20 2017<br>
@@ -760,6 +760,7 @@ emitCombinerOrInitializer(CodeGenModule<br>
       IsCombiner ? ".omp_combiner." : ".omp_initializer.", &CGM.getModule());<br>
   CGM.SetInternalFunctionAttributes(/*D=*/nullptr, Fn, FnInfo);<br>
   Fn->removeFnAttr(llvm::Attribute::NoInline);<br>
+  Fn->removeFnAttr(llvm::Attribute::OptimizeNone);<br>
   Fn->addFnAttr(llvm::Attribute::AlwaysInline);<br>
   CodeGenFunction CGF(CGM);<br>
   // Map "T omp_in;" variable to "*omp_in_parm" value in all expressions.<br>
@@ -3515,6 +3516,7 @@ emitTaskPrivateMappingFunction(CodeGenMo<br>
   CGM.SetInternalFunctionAttributes(/*D=*/nullptr, TaskPrivatesMap,<br>
                                     TaskPrivatesMapFnInfo);<br>
   TaskPrivatesMap->removeFnAttr(llvm::Attribute::NoInline);<br>
+  TaskPrivatesMap->removeFnAttr(llvm::Attribute::OptimizeNone);<br>
   TaskPrivatesMap->addFnAttr(llvm::Attribute::AlwaysInline);<br>
   CodeGenFunction CGF(CGM);<br>
   CGF.disableDebugInfo();<br>
<br>
Modified: cfe/trunk/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp (original)<br>
+++ cfe/trunk/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp Mon May 29 00:38:20 2017<br>
@@ -861,6 +861,7 @@ llvm::Value *CGOpenMPRuntimeNVPTX::emitT<br>
       D, ThreadIDVar, InnermostKind, CodeGen);<br>
   llvm::Function *OutlinedFun = cast<llvm::Function>(OutlinedFunVal);<br>
   OutlinedFun->removeFnAttr(llvm::Attribute::NoInline);<br>
+  OutlinedFun->removeFnAttr(llvm::Attribute::OptimizeNone);<br>
   OutlinedFun->addFnAttr(llvm::Attribute::AlwaysInline);<br>
<br>
   return OutlinedFun;<br>
<br>
Modified: cfe/trunk/lib/CodeGen/CodeGenModule.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CodeGenModule.cpp?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CodeGenModule.cpp?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/lib/CodeGen/CodeGenModule.cpp (original)<br>
+++ cfe/trunk/lib/CodeGen/CodeGenModule.cpp Mon May 29 00:38:20 2017<br>
@@ -907,7 +907,16 @@ void CodeGenModule::SetLLVMFunctionAttri<br>
     return;<br>
   }<br>
<br>
-  if (D->hasAttr<OptimizeNoneAttr>()) {<br>
+  // Track whether we need to add the optnone LLVM attribute,<br>
+  // starting with the default for this optimization level.<br>
+  bool ShouldAddOptNone =<br>
+      !CodeGenOpts.DisableO0ImplyOptNone && CodeGenOpts.OptimizationLevel == 0;<br>
+  // We can't add optnone in the following cases, it won't pass the verifier.<br>
+  ShouldAddOptNone &= !D->hasAttr<MinSizeAttr>();<br>
+  ShouldAddOptNone &= !F->hasFnAttribute(llvm::Attribute::AlwaysInline);<br>
+  ShouldAddOptNone &= !D->hasAttr<AlwaysInlineAttr>();<br>
+<br>
+  if (ShouldAddOptNone || D->hasAttr<OptimizeNoneAttr>()) {<br>
     B.addAttribute(llvm::Attribute::OptimizeNone);<br>
<br>
     // OptimizeNone implies noinline; we should not be inlining such functions.<br>
@@ -961,7 +970,8 @@ void CodeGenModule::SetLLVMFunctionAttri<br>
   // function.<br>
   if (!D->hasAttr<OptimizeNoneAttr>()) {<br>
     if (D->hasAttr<ColdAttr>()) {<br>
-      B.addAttribute(llvm::Attribute::OptimizeForSize);<br>
+      if (!ShouldAddOptNone)<br>
+        B.addAttribute(llvm::Attribute::OptimizeForSize);<br>
       B.addAttribute(llvm::Attribute::Cold);<br>
     }<br>
<br>
<br>
Modified: cfe/trunk/lib/Frontend/CompilerInvocation.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Frontend/CompilerInvocation.cpp?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Frontend/CompilerInvocation.cpp?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/lib/Frontend/CompilerInvocation.cpp (original)<br>
+++ cfe/trunk/lib/Frontend/CompilerInvocation.cpp Mon May 29 00:38:20 2017<br>
@@ -534,6 +534,7 @@ static bool ParseCodeGenArgs(CodeGenOpti<br>
<br>
   Opts.DisableLLVMPasses = Args.hasArg(OPT_disable_llvm_passes);<br>
   Opts.DisableLifetimeMarkers = Args.hasArg(OPT_disable_lifetimemarkers);<br>
+  Opts.DisableO0ImplyOptNone = Args.hasArg(OPT_disable_O0_optnone);<br>
   Opts.DisableRedZone = Args.hasArg(OPT_disable_red_zone);<br>
   Opts.ForbidGuardVariables = Args.hasArg(OPT_fforbid_guard_variables);<br>
   Opts.UseRegisterSizedBitfieldAccess = Args.hasArg(<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-2velem.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-2velem.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-2velem.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-2velem.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-2velem.c Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,4 @@<br>
-// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 // Test new aarch64 intrinsics and types<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-3v.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-3v.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-3v.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-3v.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-3v.c Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,4 @@<br>
-// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon  -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 // Test new aarch64 intrinsics and types<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-across.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-across.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-across.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-across.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-across.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,5 @@<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \<br>
-// RUN:   -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN:  -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 // Test new aarch64 intrinsics and types<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-extract.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-extract.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-extract.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-extract.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-extract.c Mon May 29 00:38:20 2017<br>
@@ -1,6 +1,6 @@<br>
 // REQUIRES: aarch64-registered-target<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \<br>
-// RUN:   -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN:  -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 // Test new aarch64 intrinsics and types<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-fcvt-intrinsics.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-fcvt-intrinsics.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-fcvt-intrinsics.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-fcvt-intrinsics.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-fcvt-intrinsics.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,5 @@<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \<br>
-// RUN:   -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN:  -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 // Test new aarch64 intrinsics and types<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-fma.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-fma.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-fma.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-fma.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-fma.c Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,4 @@<br>
-// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -S -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 // Test new aarch64 intrinsics and types<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,5 @@<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \<br>
-// RUN:     -fallow-half-arguments-and-returns -S -emit-llvm -o - %s \<br>
+// RUN:     -fallow-half-arguments-and-returns -S -disable-O0-optnone -emit-llvm -o - %s \<br>
 // RUN: | opt -S -mem2reg \<br>
 // RUN: | FileCheck %s<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-ldst-one.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-ldst-one.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-ldst-one.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-ldst-one.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-ldst-one.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,5 @@<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \<br>
-// RUN:   -fallow-half-arguments-and-returns -emit-llvm -o - %s \<br>
+// RUN:  -disable-O0-optnone -fallow-half-arguments-and-returns -emit-llvm -o - %s \<br>
 // RUN: | opt -S -mem2reg | FileCheck %s<br>
<br>
 #include <arm_neon.h><br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-misc.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-misc.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-misc.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-misc.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-misc.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,5 @@<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \<br>
-// RUN:  -fallow-half-arguments-and-returns -emit-llvm -o - %s \<br>
+// RUN:  -disable-O0-optnone -fallow-half-arguments-and-returns -emit-llvm -o - %s \<br>
 // RUN: | opt -S -mem2reg | FileCheck %s<br>
<br>
 // Test new aarch64 intrinsics and types<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-perm.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-perm.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-perm.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-perm.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-perm.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,5 @@<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \<br>
-// RUN:  -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 // Test new aarch64 intrinsics and types<br>
 #include <arm_neon.h><br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-scalar-copy.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-scalar-copy.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-scalar-copy.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-scalar-copy.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-scalar-copy.c Mon May 29 00:38:20 2017<br>
@@ -1,6 +1,5 @@<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \<br>
-// RUN:  -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
-<br>
+// RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 #include <arm_neon.h><br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,5 @@<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -target-cpu cyclone \<br>
-// RUN:  -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 // Test new aarch64 intrinsics and types<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-shifts.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-shifts.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-shifts.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-shifts.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-shifts.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,5 @@<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \<br>
-// RUN:   -ffp-contract=fast -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN:  -disable-O0-optnone -ffp-contract=fast -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 #include <arm_neon.h><br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-tbl.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-tbl.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-tbl.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-tbl.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-tbl.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,5 @@<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \<br>
-// RUN:   -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN: -disable-O0-optnone  -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 // Test new aarch64 intrinsics and types<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-vcombine.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-vcombine.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-vcombine.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-vcombine.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-vcombine.c Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,4 @@<br>
-// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -fallow-half-arguments-and-returns -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -fallow-half-arguments-and-returns -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 // Test new aarch64 intrinsics and types<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-vget-hilo.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-vget-hilo.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-vget-hilo.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-vget-hilo.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-vget-hilo.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,5 @@<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \<br>
-// RUN:  -fallow-half-arguments-and-returns -emit-llvm -o - %s \<br>
+// RUN:  -fallow-half-arguments-and-returns -disable-O0-optnone -emit-llvm -o - %s \<br>
 // RUN: | opt -S -mem2reg | FileCheck %s<br>
 // Test new aarch64 intrinsics and types<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-vget.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-vget.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-vget.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-vget.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-vget.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,5 @@<br>
 // RUN: %clang_cc1 -triple arm64-apple-darwin -target-feature +neon \<br>
-// RUN:   -fallow-half-arguments-and-returns -emit-llvm -o - %s \<br>
+// RUN:   -fallow-half-arguments-and-returns -disable-O0-optnone -emit-llvm -o - %s \<br>
 // RUN: | opt -S -mem2reg | FileCheck %s<br>
<br>
 #include <arm_neon.h><br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-poly128.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-poly128.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-poly128.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-poly128.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-poly128.c Mon May 29 00:38:20 2017<br>
@@ -1,6 +1,6 @@<br>
 // REQUIRES: aarch64-registered-target<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \<br>
-// RUN:  -ffp-contract=fast -emit-llvm -o - %s | opt -S -mem2reg \<br>
+// RUN: -disable-O0-optnone -ffp-contract=fast -emit-llvm -o - %s | opt -S -mem2reg \<br>
 // RUN:  | FileCheck %s<br>
<br>
 // Test new aarch64 intrinsics with poly128<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-poly64.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-poly64.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-poly64.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-poly64.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-poly64.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,5 @@<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \<br>
-// RUN:  -ffp-contract=fast -emit-llvm -o - %s | opt -S -mem2reg \<br>
+// RUN:  -ffp-contract=fast -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg \<br>
 // RUN:  | FileCheck %s<br>
<br>
 // Test new aarch64 intrinsics with poly64<br>
<br>
Modified: cfe/trunk/test/CodeGen/address-safety-attr-kasan.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/address-safety-attr-kasan.cpp?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/address-safety-attr-kasan.cpp?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/address-safety-attr-kasan.cpp (original)<br>
+++ cfe/trunk/test/CodeGen/address-safety-attr-kasan.cpp Mon May 29 00:38:20 2017<br>
@@ -1,9 +1,9 @@<br>
 // Make sure the sanitize_address attribute is emitted when using both ASan and KASan.<br>
 // Also document that __attribute__((no_sanitize_address)) doesn't disable KASan instrumentation.<br>
<br>
-/// RUN: %clang_cc1 -triple i386-unknown-linux -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-NOASAN %s<br>
-/// RUN: %clang_cc1 -triple i386-unknown-linux -fsanitize=address -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-ASAN %s<br>
-/// RUN: %clang_cc1 -triple i386-unknown-linux -fsanitize=kernel-address -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-KASAN %s<br>
+/// RUN: %clang_cc1 -triple i386-unknown-linux -disable-O0-optnone -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-NOASAN %s<br>
+/// RUN: %clang_cc1 -triple i386-unknown-linux -fsanitize=address -disable-O0-optnone -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-ASAN %s<br>
+/// RUN: %clang_cc1 -triple i386-unknown-linux -fsanitize=kernel-address -disable-O0-optnone -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-KASAN %s<br>
<br>
 int HasSanitizeAddress() {<br>
   return 1;<br>
<br>
Modified: cfe/trunk/test/CodeGen/address-safety-attr.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/address-safety-attr.cpp?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/address-safety-attr.cpp?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/address-safety-attr.cpp (original)<br>
+++ cfe/trunk/test/CodeGen/address-safety-attr.cpp Mon May 29 00:38:20 2017<br>
@@ -3,16 +3,16 @@ int DefinedInDifferentFile(int *a);<br>
 // RUN: echo "struct S { S(){} ~S(){} };" >> %t.extra-source.cpp<br>
 // RUN: echo "S glob_array[5];" >> %t.extra-source.cpp<br>
<br>
-// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin -emit-llvm -o - %s -include %t.extra-source.cpp | FileCheck -check-prefix=WITHOUT %s<br>
-// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin -emit-llvm -o - %s -include %t.extra-source.cpp -fsanitize=address | FileCheck -check-prefix=ASAN %s<br>
+// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin -disable-O0-optnone -emit-llvm -o - %s -include %t.extra-source.cpp | FileCheck -check-prefix=WITHOUT %s<br>
+// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin -disable-O0-optnone -emit-llvm -o - %s -include %t.extra-source.cpp -fsanitize=address | FileCheck -check-prefix=ASAN %s<br>
<br>
 // RUN: echo "fun:*BlacklistedFunction*" > %t.func.blacklist<br>
-// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin -emit-llvm -o - %s -include %t.extra-source.cpp -fsanitize=address -fsanitize-blacklist=%t.func.blacklist | FileCheck -check-prefix=BLFUNC %s<br>
+// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin -disable-O0-optnone -emit-llvm -o - %s -include %t.extra-source.cpp -fsanitize=address -fsanitize-blacklist=%t.func.blacklist | FileCheck -check-prefix=BLFUNC %s<br>
<br>
 // The blacklist file uses regexps, so escape backslashes, which are common in<br>
 // Windows paths.<br>
 // RUN: echo "src:%s" | sed -e 's/\\/\\\\/g' > %t.file.blacklist<br>
-// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin -emit-llvm -o - %s -include %t.extra-source.cpp -fsanitize=address -fsanitize-blacklist=%t.file.blacklist | FileCheck -check-prefix=BLFILE %s<br>
+// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin -disable-O0-optnone -emit-llvm -o - %s -include %t.extra-source.cpp -fsanitize=address -fsanitize-blacklist=%t.file.blacklist | FileCheck -check-prefix=BLFILE %s<br>
<br>
 // The sanitize_address attribute should be attached to functions<br>
 // when AddressSanitizer is enabled, unless no_sanitize_address attribute<br>
<br>
Modified: cfe/trunk/test/CodeGen/arm-crc32.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-crc32.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-crc32.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/arm-crc32.c (original)<br>
+++ cfe/trunk/test/CodeGen/arm-crc32.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,5 @@<br>
 // RUN: %clang_cc1 -triple armv8-none-linux-gnueabi \<br>
-// RUN:   -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN:  -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 int crc32b(int a, char b)<br>
 {<br>
<br>
Modified: cfe/trunk/test/CodeGen/arm-neon-directed-rounding.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-directed-rounding.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-directed-rounding.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/arm-neon-directed-rounding.c (original)<br>
+++ cfe/trunk/test/CodeGen/arm-neon-directed-rounding.c Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,4 @@<br>
-// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -emit-llvm %s -o - | opt -S -mem2reg | FileCheck %s<br>
+// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck %s<br>
<br>
 #include <arm_neon.h><br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/arm-neon-fma.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-fma.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-fma.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/arm-neon-fma.c (original)<br>
+++ cfe/trunk/test/CodeGen/arm-neon-fma.c Mon May 29 00:38:20 2017<br>
@@ -3,7 +3,7 @@<br>
 // RUN:   -target-cpu cortex-a7 \<br>
 // RUN:   -mfloat-abi hard \<br>
 // RUN:   -ffreestanding \<br>
-// RUN:   -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN:   -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 #include <arm_neon.h><br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/arm-neon-numeric-maxmin.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-numeric-maxmin.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-numeric-maxmin.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/arm-neon-numeric-maxmin.c (original)<br>
+++ cfe/trunk/test/CodeGen/arm-neon-numeric-maxmin.c Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,4 @@<br>
-// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -emit-llvm %s -o - | opt -S -mem2reg | FileCheck %s<br>
+// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck %s<br>
<br>
 #include <arm_neon.h><br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/arm-neon-shifts.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-shifts.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-shifts.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/arm-neon-shifts.c (original)<br>
+++ cfe/trunk/test/CodeGen/arm-neon-shifts.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,6 @@<br>
 // REQUIRES: arm-registered-target<br>
 // RUN: %clang_cc1 -triple thumbv7-apple-darwin \<br>
+// RUN:   -disable-O0-optnone \<br>
 // RUN:   -target-cpu cortex-a8 \<br>
 // RUN:   -ffreestanding \<br>
 // RUN:   -emit-llvm -w -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
Modified: cfe/trunk/test/CodeGen/arm-neon-vcvtX.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-vcvtX.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-vcvtX.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/arm-neon-vcvtX.c (original)<br>
+++ cfe/trunk/test/CodeGen/arm-neon-vcvtX.c Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,4 @@<br>
-// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -emit-llvm %s -o - | opt -S -mem2reg | FileCheck %s<br>
+// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck %s<br>
<br>
 #include <arm_neon.h><br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/arm-neon-vget.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-vget.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-vget.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/arm-neon-vget.c (original)<br>
+++ cfe/trunk/test/CodeGen/arm-neon-vget.c Mon May 29 00:38:20 2017<br>
@@ -4,7 +4,7 @@<br>
 // RUN:   -mfloat-abi soft \<br>
 // RUN:   -target-feature +soft-float-abi \<br>
 // RUN:   -ffreestanding \<br>
-// RUN:   -emit-llvm -w -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN:   -disable-O0-optnone -emit-llvm -w -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 #include <arm_neon.h><br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/arm64-crc32.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64-crc32.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64-crc32.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/arm64-crc32.c (original)<br>
+++ cfe/trunk/test/CodeGen/arm64-crc32.c Mon May 29 00:38:20 2017<br>
@@ -1,6 +1,6 @@<br>
 // REQUIRES: aarch64-registered-target<br>
 // RUN: %clang_cc1 -triple arm64-none-linux-gnu \<br>
-// RUN:   -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN:  -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 int crc32b(int a, char b)<br>
 {<br>
<br>
Modified: cfe/trunk/test/CodeGen/arm64-lanes.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64-lanes.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64-lanes.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/arm64-lanes.c (original)<br>
+++ cfe/trunk/test/CodeGen/arm64-lanes.c Mon May 29 00:38:20 2017<br>
@@ -1,5 +1,5 @@<br>
-// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
-// RUN: %clang_cc1 -triple aarch64_be-linux-gnu -target-feature +neon -ffreestanding -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s --check-prefix CHECK-BE<br>
+// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN: %clang_cc1 -triple aarch64_be-linux-gnu -target-feature +neon -ffreestanding -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s --check-prefix CHECK-BE<br>
<br>
 #include <arm_neon.h><br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/arm64_vcopy.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64_vcopy.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64_vcopy.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/arm64_vcopy.c (original)<br>
+++ cfe/trunk/test/CodeGen/arm64_vcopy.c Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,4 @@<br>
-// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -S -o - -emit-llvm %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -S -o - -disable-O0-optnone -emit-llvm %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 // Test ARM64 SIMD copy vector element to vector element: vcopyq_lane*<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/arm64_vdupq_n_f64.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64_vdupq_n_f64.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64_vdupq_n_f64.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/arm64_vdupq_n_f64.c (original)<br>
+++ cfe/trunk/test/CodeGen/arm64_vdupq_n_f64.c Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,4 @@<br>
-// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -fallow-half-arguments-and-returns -S -o - -emit-llvm %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -fallow-half-arguments-and-returns -S -o - -disable-O0-optnone -emit-llvm %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 #include <arm_neon.h><br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/attr-coldhot.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/attr-coldhot.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/attr-coldhot.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/attr-coldhot.c (original)<br>
+++ cfe/trunk/test/CodeGen/attr-coldhot.c Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,5 @@<br>
-// RUN: %clang_cc1 -emit-llvm %s -o - | FileCheck %s<br>
+// RUN: %clang_cc1 -emit-llvm %s -o - | FileCheck %s -check-prefixes=CHECK,O0<br>
+// RUN: %clang_cc1 -emit-llvm %s -o - -O1 -disable-llvm-passes | FileCheck %s -check-prefixes=CHECK,O1<br>
<br>
 int test1() __attribute__((__cold__)) {<br>
   return 42;<br>
@@ -8,4 +9,5 @@ int test1() __attribute__((__cold__)) {<br>
 // CHECK: ret<br>
 }<br>
<br>
-// CHECK: attributes [[ATTR]] = { {{.*}}cold{{.*}}optsize{{.*}} }<br>
+// O0: attributes [[ATTR]] = { {{.*}}cold{{.*}}optnone{{.*}} }<br>
+// O1: attributes [[ATTR]] = { {{.*}}cold{{.*}}optsize{{.*}} }<br>
<br>
Modified: cfe/trunk/test/CodeGen/attr-naked.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/attr-naked.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/attr-naked.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/attr-naked.c (original)<br>
+++ cfe/trunk/test/CodeGen/attr-naked.c Mon May 29 00:38:20 2017<br>
@@ -4,14 +4,14 @@ void t1() __attribute__((naked));<br>
<br>
 // Basic functionality check<br>
 // (Note that naked needs to imply noinline to work properly.)<br>
-// CHECK: define void @t1() [[NAKED:#[0-9]+]] {<br>
+// CHECK: define void @t1() [[NAKED_OPTNONE:#[0-9]+]] {<br>
 void t1()<br>
 {<br>
 }<br>
<br>
 // Make sure this doesn't explode in the verifier.<br>
 // (It doesn't really make sense, but it isn't invalid.)<br>
-// CHECK: define void @t2() [[NAKED]] {<br>
+// CHECK: define void @t2() [[NAKED:#[0-9]+]] {<br>
 __attribute((naked, always_inline)) void t2() {<br>
 }<br>
<br>
@@ -23,4 +23,5 @@ __attribute((naked)) void t3(int x) {<br>
 // CHECK: unreachable<br>
 }<br>
<br>
+// CHECK: attributes [[NAKED_OPTNONE]] = { naked noinline nounwind optnone{{.*}} }<br>
 // CHECK: attributes [[NAKED]] = { naked noinline nounwind{{.*}} }<br>
<br>
Modified: cfe/trunk/test/CodeGen/builtins-arm-exclusive.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm-exclusive.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm-exclusive.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/builtins-arm-exclusive.c (original)<br>
+++ cfe/trunk/test/CodeGen/builtins-arm-exclusive.c Mon May 29 00:38:20 2017<br>
@@ -1,6 +1,5 @@<br>
-// RUN: %clang_cc1 -Wall -Werror -triple thumbv8-linux-gnueabi -fno-signed-char -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
-// RUN: %clang_cc1 -Wall -Werror -triple arm64-apple-ios7.0 -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s --check-prefix=CHECK-ARM64<br>
-<br>
+// RUN: %clang_cc1 -Wall -Werror -triple thumbv8-linux-gnueabi -fno-signed-char -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN: %clang_cc1 -Wall -Werror -triple arm64-apple-ios7.0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s --check-prefix=CHECK-ARM64<br>
<br>
 struct Simple {<br>
   char a, b;<br>
<br>
Modified: cfe/trunk/test/CodeGen/builtins-arm.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/builtins-arm.c (original)<br>
+++ cfe/trunk/test/CodeGen/builtins-arm.c Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,4 @@<br>
-// RUN: %clang_cc1 -Wall -Werror -triple thumbv7-eabi -target-cpu cortex-a8 -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN: %clang_cc1 -Wall -Werror -triple thumbv7-eabi -target-cpu cortex-a8 -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 #include <stdint.h><br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/builtins-arm64.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm64.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm64.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/builtins-arm64.c (original)<br>
+++ cfe/trunk/test/CodeGen/builtins-arm64.c Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,4 @@<br>
-// RUN: %clang_cc1 -triple arm64-unknown-linux -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
+// RUN: %clang_cc1 -triple arm64-unknown-linux -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s<br>
<br>
 void f0(void *a, void *b) {<br>
        __clear_cache(a,b);<br>
<br>
Modified: cfe/trunk/test/CodeGen/noduplicate-cxx11-test.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/noduplicate-cxx11-test.cpp?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/noduplicate-cxx11-test.cpp?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/noduplicate-cxx11-test.cpp (original)<br>
+++ cfe/trunk/test/CodeGen/noduplicate-cxx11-test.cpp Mon May 29 00:38:20 2017<br>
@@ -17,4 +17,4 @@ int main() {<br>
<br>
 }<br>
<br>
-// CHECK: attributes [[NI]] = { noduplicate nounwind{{.*}} }<br>
+// CHECK: attributes [[NI]] = { noduplicate {{.*}}nounwind{{.*}} }<br>
<br>
Modified: cfe/trunk/test/CodeGen/pragma-weak.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/pragma-weak.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/pragma-weak.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/pragma-weak.c (original)<br>
+++ cfe/trunk/test/CodeGen/pragma-weak.c Mon May 29 00:38:20 2017<br>
@@ -189,4 +189,4 @@ void zzz(void){}<br>
 int correct_linkage;<br>
<br>
 // CHECK: attributes [[NI]] = { noinline nounwind{{.*}} }<br>
-// CHECK: attributes [[RN]] = { noinline nounwind readnone{{.*}} }<br>
+// CHECK: attributes [[RN]] = { noinline nounwind optnone readnone{{.*}} }<br>
<br>
Modified: cfe/trunk/test/CodeGen/unwind-attr.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/unwind-attr.c?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/unwind-attr.c?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/unwind-attr.c (original)<br>
+++ cfe/trunk/test/CodeGen/unwind-attr.c Mon May 29 00:38:20 2017<br>
@@ -23,7 +23,7 @@ __attribute__((weak)) int test2(void) {<br>
   return 0;<br>
 }<br>
<br>
-// CHECK: attributes [[TF]] = { noinline "{{.*}} }<br>
+// CHECK: attributes [[TF]] = { noinline optnone "{{.*}} }<br>
 // CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }<br>
<br>
 // CHECK-NOEXC: attributes [[NUW]] = { noinline nounwind{{.*}} }<br>
<br>
Modified: cfe/trunk/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp (original)<br>
+++ cfe/trunk/test/CodeGenCXX/apple-kext-indirect-virtual-dtor-call.cpp Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,4 @@<br>
-// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fapple-kext -fno-rtti -emit-llvm -o - %s | FileCheck %s<br>
+// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fapple-kext -fno-rtti -disable-O0-optnone -emit-llvm -o - %s | FileCheck %s<br>
<br>
 // CHECK: @_ZTV5TemplIiE = internal unnamed_addr constant { [7 x i8*] } { [7 x i8*] [i8* null, i8* null, i8* bitcast (void (%struct.Templ*)* @_ZN5TemplIiED1Ev to i8*), i8* bitcast (void (%struct.Templ*)* @_ZN5TemplIiED0Ev to i8*), i8* bitcast (void (%struct.Templ*)* @_ZN5TemplIiE1fEv to i8*), i8* bitcast (void (%struct.Templ*)* @_ZN5TemplIiE1gEv to i8*), i8* null] }<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGenCXX/apple-kext-no-staticinit-section.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/apple-kext-no-staticinit-section.cpp?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/apple-kext-no-staticinit-section.cpp?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGenCXX/apple-kext-no-staticinit-section.cpp (original)<br>
+++ cfe/trunk/test/CodeGenCXX/apple-kext-no-staticinit-section.cpp Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,4 @@<br>
-// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fapple-kext -fno-rtti -emit-llvm -o - %s | FileCheck %s<br>
+// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fapple-kext -fno-rtti -disable-O0-optnone -emit-llvm -o - %s | FileCheck %s<br>
 // rdar://8825235<br>
 /**<br>
 1) Normally, global object construction code ends up in __StaticInit segment of text section<br>
<br>
Modified: cfe/trunk/test/CodeGenCXX/debug-info-global-ctor-dtor.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/debug-info-global-ctor-dtor.cpp?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/debug-info-global-ctor-dtor.cpp?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGenCXX/debug-info-global-ctor-dtor.cpp (original)<br>
+++ cfe/trunk/test/CodeGenCXX/debug-info-global-ctor-dtor.cpp Mon May 29 00:38:20 2017<br>
@@ -1,6 +1,6 @@<br>
-// RUN: %clang_cc1 %s -debug-info-kind=limited -triple %itanium_abi_triple -fno-use-cxa-atexit -S -emit-llvm -o - \<br>
+// RUN: %clang_cc1 %s -debug-info-kind=limited -triple %itanium_abi_triple -fno-use-cxa-atexit -S -disable-O0-optnone  -emit-llvm -o - \<br>
 // RUN:     | FileCheck %s --check-prefix=CHECK-NOKEXT<br>
-// RUN: %clang_cc1 %s -debug-info-kind=limited -triple %itanium_abi_triple -fno-use-cxa-atexit -fapple-kext -S -emit-llvm -o - \<br>
+// RUN: %clang_cc1 %s -debug-info-kind=limited -triple %itanium_abi_triple -fno-use-cxa-atexit -fapple-kext -S -disable-O0-optnone -emit-llvm -o - \<br>
 // RUN:     | FileCheck %s --check-prefix=CHECK-KEXT<br>
<br>
 class A {<br>
<br>
Modified: cfe/trunk/test/CodeGenCXX/optnone-templates.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/optnone-templates.cpp?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/optnone-templates.cpp?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGenCXX/optnone-templates.cpp (original)<br>
+++ cfe/trunk/test/CodeGenCXX/optnone-templates.cpp Mon May 29 00:38:20 2017<br>
@@ -1,4 +1,4 @@<br>
-// RUN: %clang_cc1 %s -triple %itanium_abi_triple -std=c++11 -emit-llvm -o - | FileCheck %s<br>
+// RUN: %clang_cc1 %s -triple %itanium_abi_triple -std=c++11 -disable-O0-optnone -emit-llvm -o - | FileCheck %s<br>
<br>
 // Test optnone on template instantiations.<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp (original)<br>
+++ cfe/trunk/test/CodeGenCXX/static-init-wasm.cpp Mon May 29 00:38:20 2017<br>
@@ -43,12 +43,12 @@ struct A {<br>
<br>
 A theA;<br>
<br>
-// WEBASSEMBLY32: define internal void @__cxx_global_var_init() #0 section ".text.__startup" {<br>
+// WEBASSEMBLY32: define internal void @__cxx_global_var_init() #3 section ".text.__startup" {<br>
 // WEBASSEMBLY32: call %struct.A* @_ZN1AC1Ev(%struct.A* @theA)<br>
-// WEBASSEMBLY32: define internal void @_GLOBAL__sub_I_static_init_wasm.cpp() #0 section ".text.__startup" {<br>
+// WEBASSEMBLY32: define internal void @_GLOBAL__sub_I_static_init_wasm.cpp() #3 section ".text.__startup" {<br>
 // WEBASSEMBLY32: call void @__cxx_global_var_init()<br>
 //<br>
-// WEBASSEMBLY64: define internal void @__cxx_global_var_init() #0 section ".text.__startup" {<br>
+// WEBASSEMBLY64: define internal void @__cxx_global_var_init() #3 section ".text.__startup" {<br>
 // WEBASSEMBLY64: call %struct.A* @_ZN1AC1Ev(%struct.A* @theA)<br>
-// WEBASSEMBLY64: define internal void @_GLOBAL__sub_I_static_init_wasm.cpp() #0 section ".text.__startup" {<br>
+// WEBASSEMBLY64: define internal void @_GLOBAL__sub_I_static_init_wasm.cpp() #3 section ".text.__startup" {<br>
 // WEBASSEMBLY64: call void @__cxx_global_var_init()<br>
<br>
Modified: cfe/trunk/test/CodeGenCXX/thunks.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/thunks.cpp?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenCXX/thunks.cpp?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGenCXX/thunks.cpp (original)<br>
+++ cfe/trunk/test/CodeGenCXX/thunks.cpp Mon May 29 00:38:20 2017<br>
@@ -401,5 +401,5 @@ D::~D() {}<br>
 // CHECK-OPT-LABEL: define linkonce_odr void @_ZN6Test101C3fooEv<br>
 // CHECK-OPT-LABEL: define linkonce_odr void @_ZThn8_N6Test101C3fooEv<br>
<br>
-// CHECK-NONOPT: attributes [[NUW]] = { noinline nounwind uwtable{{.*}} }<br>
+// CHECK-NONOPT: attributes [[NUW]] = { noinline nounwind optnone uwtable{{.*}} }<br>
 // CHECK-OPT: attributes [[NUW]] = { nounwind uwtable{{.*}} }<br>
<br>
Modified: cfe/trunk/test/CodeGenObjC/gnu-exceptions.m<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/gnu-exceptions.m?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/gnu-exceptions.m?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGenObjC/gnu-exceptions.m (original)<br>
+++ cfe/trunk/test/CodeGenObjC/gnu-exceptions.m Mon May 29 00:38:20 2017<br>
@@ -32,4 +32,4 @@ void test0() {<br>
   log(1);<br>
 }<br>
<br>
-// CHECK: attributes [[TF]] = { noinline "{{.*}} }<br>
+// CHECK: attributes [[TF]] = { noinline optnone "{{.*}} }<br>
<br>
Modified: cfe/trunk/test/CodeGenOpenCL/<a href="http://amdgpu-attrs.cl" rel="noreferrer" target="_blank">amdgpu-attrs.cl</a><br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenOpenCL/amdgpu-attrs.cl?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenOpenCL/amdgpu-attrs.cl?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGenOpenCL/<a href="http://amdgpu-attrs.cl" rel="noreferrer" target="_blank">amdgpu-attrs.cl</a> (original)<br>
+++ cfe/trunk/test/CodeGenOpenCL/<a href="http://amdgpu-attrs.cl" rel="noreferrer" target="_blank">amdgpu-attrs.cl</a> Mon May 29 00:38:20 2017<br>
@@ -151,28 +151,28 @@ kernel void reqd_work_group_size_32_2_1_<br>
 // CHECK-NOT: "amdgpu-num-sgpr"="0"<br>
 // CHECK-NOT: "amdgpu-num-vgpr"="0"<br>
<br>
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64]] = { noinline nounwind "amdgpu-flat-work-group-size"="32,64"<br>
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_64_64]] = { noinline nounwind "amdgpu-flat-work-group-size"="64,64"<br>
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_16_128]] = { noinline nounwind "amdgpu-flat-work-group-size"="16,128"<br>
-// CHECK-DAG: attributes [[WAVES_PER_EU_2]] = { noinline nounwind "amdgpu-waves-per-eu"="2"<br>
-// CHECK-DAG: attributes [[WAVES_PER_EU_2_4]] = { noinline nounwind "amdgpu-waves-per-eu"="2,4"<br>
-// CHECK-DAG: attributes [[NUM_SGPR_32]] = { noinline nounwind "amdgpu-num-sgpr"="32"<br>
-// CHECK-DAG: attributes [[NUM_VGPR_64]] = { noinline nounwind "amdgpu-num-vgpr"="64"<br>
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64"<br>
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_64_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="64,64"<br>
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_16_128]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="16,128"<br>
+// CHECK-DAG: attributes [[WAVES_PER_EU_2]] = { noinline nounwind optnone "amdgpu-waves-per-eu"="2"<br>
+// CHECK-DAG: attributes [[WAVES_PER_EU_2_4]] = { noinline nounwind optnone "amdgpu-waves-per-eu"="2,4"<br>
+// CHECK-DAG: attributes [[NUM_SGPR_32]] = { noinline nounwind optnone "amdgpu-num-sgpr"="32"<br>
+// CHECK-DAG: attributes [[NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-num-vgpr"="64"<br>
<br>
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2]] = { noinline nounwind "amdgpu-flat-work-group-size"="32,64" "amdgpu-waves-per-eu"="2"<br>
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4]] = { noinline nounwind "amdgpu-flat-work-group-size"="32,64" "amdgpu-waves-per-eu"="2,4"<br>
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_NUM_SGPR_32]] = { noinline nounwind "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-sgpr"="32"<br>
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_NUM_VGPR_64]] = { noinline nounwind "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-vgpr"="64"<br>
-// CHECK-DAG: attributes [[WAVES_PER_EU_2_NUM_SGPR_32]] = { noinline nounwind "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2"<br>
-// CHECK-DAG: attributes [[WAVES_PER_EU_2_NUM_VGPR_64]] = { noinline nounwind "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"<br>
-// CHECK-DAG: attributes [[WAVES_PER_EU_2_4_NUM_SGPR_32]] = { noinline nounwind "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2,4"<br>
-// CHECK-DAG: attributes [[WAVES_PER_EU_2_4_NUM_VGPR_64]] = { noinline nounwind "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"<br>
-// CHECK-DAG: attributes [[NUM_SGPR_32_NUM_VGPR_64]] = { noinline nounwind "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64"<br>
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-waves-per-eu"="2"<br>
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-waves-per-eu"="2,4"<br>
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_NUM_SGPR_32]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-sgpr"="32"<br>
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-vgpr"="64"<br>
+// CHECK-DAG: attributes [[WAVES_PER_EU_2_NUM_SGPR_32]] = { noinline nounwind optnone "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2"<br>
+// CHECK-DAG: attributes [[WAVES_PER_EU_2_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"<br>
+// CHECK-DAG: attributes [[WAVES_PER_EU_2_4_NUM_SGPR_32]] = { noinline nounwind optnone "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2,4"<br>
+// CHECK-DAG: attributes [[WAVES_PER_EU_2_4_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"<br>
+// CHECK-DAG: attributes [[NUM_SGPR_32_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64"<br>
<br>
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32]] = { noinline nounwind "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2"<br>
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_VGPR_64]] = { noinline nounwind "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"<br>
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32]] = { noinline nounwind "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2,4"<br>
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_VGPR_64]] = { noinline nounwind "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"<br>
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2"<br>
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"<br>
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2,4"<br>
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"<br>
<br>
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32_NUM_VGPR_64]] = { noinline nounwind "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"<br>
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32_NUM_VGPR_64]] = { noinline nounwind "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"<br>
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"<br>
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"<br>
<br>
Modified: cfe/trunk/test/Driver/darwin-iphone-defaults.m<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/darwin-iphone-defaults.m?rev=304127&r1=304126&r2=304127&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/darwin-iphone-defaults.m?rev=304127&r1=304126&r2=304127&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/Driver/darwin-iphone-defaults.m (original)<br>
+++ cfe/trunk/test/Driver/darwin-iphone-defaults.m Mon May 29 00:38:20 2017<br>
@@ -26,4 +26,4 @@ void f1() {<br>
   [I1 alloc];<br>
 }<br>
<br>
-// CHECK: attributes [[F0]] = { noinline ssp{{.*}} }<br>
+// CHECK: attributes [[F0]] = { noinline  optnone ssp{{.*}} }<br>
<br>
<br>
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</blockquote></div>
</div></div></blockquote></div><br></div></div></blockquote></div>