<div dir="ltr"><div>There was an off list mail to me on this.</div><div><br></div><div>The 0-255 checks don't work for the builtins that take a char immediate and char is signed. In that case the range change needs to be -128 to 127 instead of 0 to 255.<br></div></div><div class="gmail_extra"><br><div class="gmail_quote">On Tue, May 17, 2016 at 3:09 PM, Sean Silva via cfe-commits <span dir="ltr"><<a href="mailto:cfe-commits@lists.llvm.org" target="_blank">cfe-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote"><span class="">On Tue, May 17, 2016 at 7:07 AM, Filipe Cabecinhas via cfe-commits <span dir="ltr"><<a href="mailto:cfe-commits@lists.llvm.org" target="_blank">cfe-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: filcab<br>
Date: Tue May 17 09:07:43 2016<br>
New Revision: 269765<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=269765&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=269765&view=rev</a><br>
Log:<br>
Revert "[X86] Add immediate range checks for many of the builtins."<br>
<br>
This reverts commit r269619.<br></blockquote><div><br></div></span><div>In the future could you include the reason too?</div><div><br></div><div>-- Sean Silva</div><div><div class="h5"><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
Modified:<br>
cfe/trunk/lib/Sema/SemaChecking.cpp<br>
cfe/trunk/test/CodeGen/avx512vl-builtins.c<br>
<br>
Modified: cfe/trunk/lib/Sema/SemaChecking.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Sema/SemaChecking.cpp?rev=269765&r1=269764&r2=269765&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Sema/SemaChecking.cpp?rev=269765&r1=269764&r2=269765&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/lib/Sema/SemaChecking.cpp (original)<br>
+++ cfe/trunk/lib/Sema/SemaChecking.cpp Tue May 17 09:07:43 2016<br>
@@ -1323,52 +1323,23 @@ bool Sema::CheckX86BuiltinFunctionCall(u<br>
return SemaBuiltinCpuSupports(*this, TheCall);<br>
case X86::BI__builtin_ms_va_start:<br>
return SemaBuiltinMSVAStart(TheCall);<br>
- case X86::BI__builtin_ia32_extractf64x4_mask:<br>
- case X86::BI__builtin_ia32_extracti64x4_mask:<br>
- case X86::BI__builtin_ia32_extractf32x8_mask:<br>
- case X86::BI__builtin_ia32_extracti32x8_mask:<br>
- case X86::BI__builtin_ia32_extractf64x2_256_mask:<br>
- case X86::BI__builtin_ia32_extracti64x2_256_mask:<br>
- case X86::BI__builtin_ia32_extractf32x4_256_mask:<br>
- case X86::BI__builtin_ia32_extracti32x4_256_mask:<br>
- i = 1; l = 0; u = 1;<br>
- break;<br>
case X86::BI_mm_prefetch:<br>
- case X86::BI__builtin_ia32_extractf32x4_mask:<br>
- case X86::BI__builtin_ia32_extracti32x4_mask:<br>
- case X86::BI__builtin_ia32_vpermilpd_mask:<br>
- case X86::BI__builtin_ia32_vpermilps_mask:<br>
- case X86::BI__builtin_ia32_extractf64x2_512_mask:<br>
- case X86::BI__builtin_ia32_extracti64x2_512_mask:<br>
- i = 1; l = 0; u = 3;<br>
- break;<br>
- case X86::BI__builtin_ia32_insertf32x8_mask:<br>
- case X86::BI__builtin_ia32_inserti32x8_mask:<br>
- case X86::BI__builtin_ia32_insertf64x4_mask:<br>
- case X86::BI__builtin_ia32_inserti64x4_mask:<br>
- case X86::BI__builtin_ia32_insertf64x2_256_mask:<br>
- case X86::BI__builtin_ia32_inserti64x2_256_mask:<br>
- case X86::BI__builtin_ia32_insertf32x4_256_mask:<br>
- case X86::BI__builtin_ia32_inserti32x4_256_mask:<br>
- i = 2; l = 0; u = 1;<br>
+ i = 1;<br>
+ l = 0;<br>
+ u = 3;<br>
break;<br>
case X86::BI__builtin_ia32_sha1rnds4:<br>
- case X86::BI__builtin_ia32_shuf_f32x4_256_mask:<br>
- case X86::BI__builtin_ia32_shuf_f64x2_256_mask:<br>
- case X86::BI__builtin_ia32_shuf_i32x4_256_mask:<br>
- case X86::BI__builtin_ia32_shuf_i64x2_256_mask:<br>
- case X86::BI__builtin_ia32_shufpd128_mask:<br>
- case X86::BI__builtin_ia32_insertf64x2_512_mask:<br>
- case X86::BI__builtin_ia32_inserti64x2_512_mask:<br>
- case X86::BI__builtin_ia32_insertf32x4_mask:<br>
- case X86::BI__builtin_ia32_inserti32x4_mask:<br>
- i = 2; l = 0; u = 3;<br>
+ i = 2;<br>
+ l = 0;<br>
+ u = 3;<br>
break;<br>
case X86::BI__builtin_ia32_vpermil2pd:<br>
case X86::BI__builtin_ia32_vpermil2pd256:<br>
case X86::BI__builtin_ia32_vpermil2ps:<br>
case X86::BI__builtin_ia32_vpermil2ps256:<br>
- i = 3; l = 0; u = 3;<br>
+ i = 3;<br>
+ l = 0;<br>
+ u = 3;<br>
break;<br>
case X86::BI__builtin_ia32_cmpb128_mask:<br>
case X86::BI__builtin_ia32_cmpw128_mask:<br>
@@ -1394,36 +1365,23 @@ bool Sema::CheckX86BuiltinFunctionCall(u<br>
case X86::BI__builtin_ia32_ucmpw512_mask:<br>
case X86::BI__builtin_ia32_ucmpd512_mask:<br>
case X86::BI__builtin_ia32_ucmpq512_mask:<br>
- case X86::BI__builtin_ia32_vpcomub:<br>
- case X86::BI__builtin_ia32_vpcomuw:<br>
- case X86::BI__builtin_ia32_vpcomud:<br>
- case X86::BI__builtin_ia32_vpcomuq:<br>
- case X86::BI__builtin_ia32_vpcomb:<br>
- case X86::BI__builtin_ia32_vpcomw:<br>
- case X86::BI__builtin_ia32_vpcomd:<br>
- case X86::BI__builtin_ia32_vpcomq:<br>
- i = 2; l = 0; u = 7;<br>
+ i = 2;<br>
+ l = 0;<br>
+ u = 7;<br>
break;<br>
case X86::BI__builtin_ia32_roundps:<br>
case X86::BI__builtin_ia32_roundpd:<br>
case X86::BI__builtin_ia32_roundps256:<br>
case X86::BI__builtin_ia32_roundpd256:<br>
- case X86::BI__builtin_ia32_vpermilpd256_mask:<br>
- case X86::BI__builtin_ia32_vpermilps256_mask:<br>
- i = 1; l = 0; u = 15;<br>
+ i = 1;<br>
+ l = 0;<br>
+ u = 15;<br>
break;<br>
case X86::BI__builtin_ia32_roundss:<br>
case X86::BI__builtin_ia32_roundsd:<br>
- case X86::BI__builtin_ia32_rangepd128_mask:<br>
- case X86::BI__builtin_ia32_rangepd256_mask:<br>
- case X86::BI__builtin_ia32_rangepd512_mask:<br>
- case X86::BI__builtin_ia32_rangeps128_mask:<br>
- case X86::BI__builtin_ia32_rangeps256_mask:<br>
- case X86::BI__builtin_ia32_rangeps512_mask:<br>
- case X86::BI__builtin_ia32_getmantsd_round_mask:<br>
- case X86::BI__builtin_ia32_getmantss_round_mask:<br>
- case X86::BI__builtin_ia32_shufpd256_mask:<br>
- i = 2; l = 0; u = 15;<br>
+ i = 2;<br>
+ l = 0;<br>
+ u = 15;<br>
break;<br>
case X86::BI__builtin_ia32_cmpps:<br>
case X86::BI__builtin_ia32_cmpss:<br>
@@ -1431,183 +1389,23 @@ bool Sema::CheckX86BuiltinFunctionCall(u<br>
case X86::BI__builtin_ia32_cmpsd:<br>
case X86::BI__builtin_ia32_cmpps256:<br>
case X86::BI__builtin_ia32_cmppd256:<br>
- case X86::BI__builtin_ia32_cmpps128_mask:<br>
- case X86::BI__builtin_ia32_cmppd128_mask:<br>
- case X86::BI__builtin_ia32_cmpps256_mask:<br>
- case X86::BI__builtin_ia32_cmppd256_mask:<br>
case X86::BI__builtin_ia32_cmpps512_mask:<br>
case X86::BI__builtin_ia32_cmppd512_mask:<br>
- case X86::BI__builtin_ia32_cmpsd_mask:<br>
- case X86::BI__builtin_ia32_cmpss_mask:<br>
- i = 2; l = 0; u = 31;<br>
- break;<br>
- case X86::BI__builtin_ia32_xabort:<br>
- i = 0; l = 0; u = 255;<br>
+ i = 2;<br>
+ l = 0;<br>
+ u = 31;<br>
break;<br>
- case X86::BI__builtin_ia32_pshufw:<br>
- case X86::BI__builtin_ia32_aeskeygenassist128:<br>
- case X86::BI__builtin_ia32_vcvtps2ph:<br>
- case X86::BI__builtin_ia32_vcvtps2ph256:<br>
- case X86::BI__builtin_ia32_vcvtps2ph512:<br>
- case X86::BI__builtin_ia32_rndscaleps_128_mask:<br>
- case X86::BI__builtin_ia32_rndscalepd_128_mask:<br>
- case X86::BI__builtin_ia32_rndscaleps_256_mask:<br>
- case X86::BI__builtin_ia32_rndscalepd_256_mask:<br>
- case X86::BI__builtin_ia32_rndscaleps_mask:<br>
- case X86::BI__builtin_ia32_rndscalepd_mask:<br>
- case X86::BI__builtin_ia32_reducepd128_mask:<br>
- case X86::BI__builtin_ia32_reducepd256_mask:<br>
- case X86::BI__builtin_ia32_reducepd512_mask:<br>
- case X86::BI__builtin_ia32_reduceps128_mask:<br>
- case X86::BI__builtin_ia32_reduceps256_mask:<br>
- case X86::BI__builtin_ia32_reduceps512_mask:<br>
- case X86::BI__builtin_ia32_prold512_mask:<br>
- case X86::BI__builtin_ia32_prolq512_mask:<br>
- case X86::BI__builtin_ia32_prold128_mask:<br>
- case X86::BI__builtin_ia32_prold256_mask:<br>
- case X86::BI__builtin_ia32_prolq128_mask:<br>
- case X86::BI__builtin_ia32_prolq256_mask:<br>
- case X86::BI__builtin_ia32_prord128_mask:<br>
- case X86::BI__builtin_ia32_prord256_mask:<br>
- case X86::BI__builtin_ia32_prorq128_mask:<br>
- case X86::BI__builtin_ia32_prorq256_mask:<br>
- case X86::BI__builtin_ia32_pshufhw512_mask:<br>
- case X86::BI__builtin_ia32_pshuflw512_mask:<br>
- case X86::BI__builtin_ia32_pshufhw128_mask:<br>
- case X86::BI__builtin_ia32_pshufhw256_mask:<br>
- case X86::BI__builtin_ia32_pshuflw128_mask:<br>
- case X86::BI__builtin_ia32_pshuflw256_mask:<br>
- case X86::BI__builtin_ia32_psllwi512_mask:<br>
- case X86::BI__builtin_ia32_psllwi128_mask:<br>
- case X86::BI__builtin_ia32_psllwi256_mask:<br>
- case X86::BI__builtin_ia32_psrldi128_mask:<br>
- case X86::BI__builtin_ia32_psrldi256_mask:<br>
- case X86::BI__builtin_ia32_psrldi512_mask:<br>
- case X86::BI__builtin_ia32_psrlqi128_mask:<br>
- case X86::BI__builtin_ia32_psrlqi256_mask:<br>
- case X86::BI__builtin_ia32_psrlqi512_mask:<br>
- case X86::BI__builtin_ia32_psrawi512_mask:<br>
- case X86::BI__builtin_ia32_psrawi128_mask:<br>
- case X86::BI__builtin_ia32_psrawi256_mask:<br>
- case X86::BI__builtin_ia32_psrlwi512_mask:<br>
- case X86::BI__builtin_ia32_psrlwi128_mask:<br>
- case X86::BI__builtin_ia32_psrlwi256_mask:<br>
- case X86::BI__builtin_ia32_vpermilpd512_mask:<br>
- case X86::BI__builtin_ia32_vpermilps512_mask:<br>
- case X86::BI__builtin_ia32_psradi128_mask:<br>
- case X86::BI__builtin_ia32_psradi256_mask:<br>
- case X86::BI__builtin_ia32_psradi512_mask:<br>
- case X86::BI__builtin_ia32_psraqi128_mask:<br>
- case X86::BI__builtin_ia32_psraqi256_mask:<br>
- case X86::BI__builtin_ia32_psraqi512_mask:<br>
- case X86::BI__builtin_ia32_pslldi128_mask:<br>
- case X86::BI__builtin_ia32_pslldi256_mask:<br>
- case X86::BI__builtin_ia32_pslldi512_mask:<br>
- case X86::BI__builtin_ia32_psllqi128_mask:<br>
- case X86::BI__builtin_ia32_psllqi256_mask:<br>
- case X86::BI__builtin_ia32_psllqi512_mask:<br>
- case X86::BI__builtin_ia32_permdf512_mask:<br>
- case X86::BI__builtin_ia32_permdi512_mask:<br>
- case X86::BI__builtin_ia32_permdf256_mask:<br>
- case X86::BI__builtin_ia32_permdi256_mask:<br>
- case X86::BI__builtin_ia32_fpclasspd128_mask:<br>
- case X86::BI__builtin_ia32_fpclasspd256_mask:<br>
- case X86::BI__builtin_ia32_fpclassps128_mask:<br>
- case X86::BI__builtin_ia32_fpclassps256_mask:<br>
- case X86::BI__builtin_ia32_fpclassps512_mask:<br>
- case X86::BI__builtin_ia32_fpclasspd512_mask:<br>
- case X86::BI__builtin_ia32_fpclasssd_mask:<br>
- case X86::BI__builtin_ia32_fpclassss_mask:<br>
- case X86::BI__builtin_ia32_pshufd512_mask:<br>
- case X86::BI__builtin_ia32_pshufd256_mask:<br>
- case X86::BI__builtin_ia32_pshufd128_mask:<br>
- i = 1; l = 0; u = 255;<br>
- break;<br>
- case X86::BI__builtin_ia32_palignr:<br>
- case X86::BI__builtin_ia32_palignr128:<br>
- case X86::BI__builtin_ia32_palignr256:<br>
- case X86::BI__builtin_ia32_palignr128_mask:<br>
- case X86::BI__builtin_ia32_palignr256_mask:<br>
- case X86::BI__builtin_ia32_palignr512_mask:<br>
- case X86::BI__builtin_ia32_insertps128:<br>
- case X86::BI__builtin_ia32_dpps:<br>
- case X86::BI__builtin_ia32_dppd:<br>
- case X86::BI__builtin_ia32_dpps256:<br>
- case X86::BI__builtin_ia32_mpsadbw128:<br>
- case X86::BI__builtin_ia32_mpsadbw256:<br>
- case X86::BI__builtin_ia32_pcmpistrm128:<br>
- case X86::BI__builtin_ia32_pcmpistri128:<br>
- case X86::BI__builtin_ia32_pcmpistria128:<br>
- case X86::BI__builtin_ia32_pcmpistric128:<br>
- case X86::BI__builtin_ia32_pcmpistrio128:<br>
- case X86::BI__builtin_ia32_pcmpistris128:<br>
- case X86::BI__builtin_ia32_pcmpistriz128:<br>
- case X86::BI__builtin_ia32_pclmulqdq128:<br>
- case X86::BI__builtin_ia32_vperm2f128_pd256:<br>
- case X86::BI__builtin_ia32_vperm2f128_ps256:<br>
- case X86::BI__builtin_ia32_vperm2f128_si256:<br>
- case X86::BI__builtin_ia32_permti256:<br>
- case X86::BI__builtin_ia32_alignq512_mask:<br>
- case X86::BI__builtin_ia32_alignd512_mask:<br>
- case X86::BI__builtin_ia32_alignd128_mask:<br>
- case X86::BI__builtin_ia32_alignd256_mask:<br>
- case X86::BI__builtin_ia32_alignq128_mask:<br>
- case X86::BI__builtin_ia32_alignq256_mask:<br>
- case X86::BI__builtin_ia32_vcomisd:<br>
- case X86::BI__builtin_ia32_vcomiss:<br>
- case X86::BI__builtin_ia32_shuf_f32x4_mask:<br>
- case X86::BI__builtin_ia32_shuf_f64x2_mask:<br>
- case X86::BI__builtin_ia32_shuf_i32x4_mask:<br>
- case X86::BI__builtin_ia32_shuf_i64x2_mask:<br>
- case X86::BI__builtin_ia32_shufpd512_mask:<br>
- case X86::BI__builtin_ia32_shufps128_mask:<br>
- case X86::BI__builtin_ia32_shufps256_mask:<br>
- case X86::BI__builtin_ia32_shufps512_mask:<br>
- case X86::BI__builtin_ia32_dbpsadbw128_mask:<br>
- case X86::BI__builtin_ia32_dbpsadbw256_mask:<br>
- case X86::BI__builtin_ia32_dbpsadbw512_mask:<br>
- i = 2; l = 0; u = 255;<br>
- break;<br>
- case X86::BI__builtin_ia32_fixupimmpd512_mask:<br>
- case X86::BI__builtin_ia32_fixupimmpd512_maskz:<br>
- case X86::BI__builtin_ia32_fixupimmps512_mask:<br>
- case X86::BI__builtin_ia32_fixupimmps512_maskz:<br>
- case X86::BI__builtin_ia32_fixupimmsd_mask:<br>
- case X86::BI__builtin_ia32_fixupimmsd_maskz:<br>
- case X86::BI__builtin_ia32_fixupimmss_mask:<br>
- case X86::BI__builtin_ia32_fixupimmss_maskz:<br>
- case X86::BI__builtin_ia32_fixupimmpd128_mask:<br>
- case X86::BI__builtin_ia32_fixupimmpd128_maskz:<br>
- case X86::BI__builtin_ia32_fixupimmpd256_mask:<br>
- case X86::BI__builtin_ia32_fixupimmpd256_maskz:<br>
- case X86::BI__builtin_ia32_fixupimmps128_mask:<br>
- case X86::BI__builtin_ia32_fixupimmps128_maskz:<br>
- case X86::BI__builtin_ia32_fixupimmps256_mask:<br>
- case X86::BI__builtin_ia32_fixupimmps256_maskz:<br>
- case X86::BI__builtin_ia32_pternlogd512_mask:<br>
- case X86::BI__builtin_ia32_pternlogd512_maskz:<br>
- case X86::BI__builtin_ia32_pternlogq512_mask:<br>
- case X86::BI__builtin_ia32_pternlogq512_maskz:<br>
- case X86::BI__builtin_ia32_pternlogd128_mask:<br>
- case X86::BI__builtin_ia32_pternlogd128_maskz:<br>
- case X86::BI__builtin_ia32_pternlogd256_mask:<br>
- case X86::BI__builtin_ia32_pternlogd256_maskz:<br>
- case X86::BI__builtin_ia32_pternlogq128_mask:<br>
- case X86::BI__builtin_ia32_pternlogq128_maskz:<br>
- case X86::BI__builtin_ia32_pternlogq256_mask:<br>
- case X86::BI__builtin_ia32_pternlogq256_maskz:<br>
- i = 3; l = 0; u = 255;<br>
- break;<br>
- case X86::BI__builtin_ia32_pcmpestrm128:<br>
- case X86::BI__builtin_ia32_pcmpestri128:<br>
- case X86::BI__builtin_ia32_pcmpestria128:<br>
- case X86::BI__builtin_ia32_pcmpestric128:<br>
- case X86::BI__builtin_ia32_pcmpestrio128:<br>
- case X86::BI__builtin_ia32_pcmpestris128:<br>
- case X86::BI__builtin_ia32_pcmpestriz128:<br>
- case X86::BI__builtin_ia32_rndscalesd_round_mask:<br>
- case X86::BI__builtin_ia32_rndscaless_round_mask:<br>
- i = 4; l = 0; u = 255;<br>
+ case X86::BI__builtin_ia32_vpcomub:<br>
+ case X86::BI__builtin_ia32_vpcomuw:<br>
+ case X86::BI__builtin_ia32_vpcomud:<br>
+ case X86::BI__builtin_ia32_vpcomuq:<br>
+ case X86::BI__builtin_ia32_vpcomb:<br>
+ case X86::BI__builtin_ia32_vpcomw:<br>
+ case X86::BI__builtin_ia32_vpcomd:<br>
+ case X86::BI__builtin_ia32_vpcomq:<br>
+ i = 2;<br>
+ l = 0;<br>
+ u = 7;<br>
break;<br>
}<br>
return SemaBuiltinConstantArgRange(TheCall, i, l, u);<br>
<br>
Modified: cfe/trunk/test/CodeGen/avx512vl-builtins.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vl-builtins.c?rev=269765&r1=269764&r2=269765&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vl-builtins.c?rev=269765&r1=269764&r2=269765&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/avx512vl-builtins.c (original)<br>
+++ cfe/trunk/test/CodeGen/avx512vl-builtins.c Tue May 17 09:07:43 2016<br>
@@ -5090,97 +5090,97 @@ __m256i test_mm256_maskz_ternarylogic_ep<br>
__m256 test_mm256_shuffle_f32x4(__m256 __A, __m256 __B) {<br>
// CHECK-LABEL: @test_mm256_shuffle_f32x4<br>
// CHECK: @llvm.x86.avx512.mask.shuf.f32x4<br>
- return _mm256_shuffle_f32x4(__A, __B, 3);<br>
+ return _mm256_shuffle_f32x4(__A, __B, 4);<br>
}<br>
<br>
__m256 test_mm256_mask_shuffle_f32x4(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {<br>
// CHECK-LABEL: @test_mm256_mask_shuffle_f32x4<br>
// CHECK: @llvm.x86.avx512.mask.shuf.f32x4<br>
- return _mm256_mask_shuffle_f32x4(__W, __U, __A, __B, 3);<br>
+ return _mm256_mask_shuffle_f32x4(__W, __U, __A, __B, 4);<br>
}<br>
<br>
__m256 test_mm256_maskz_shuffle_f32x4(__mmask8 __U, __m256 __A, __m256 __B) {<br>
// CHECK-LABEL: @test_mm256_maskz_shuffle_f32x4<br>
// CHECK: @llvm.x86.avx512.mask.shuf.f32x4<br>
- return _mm256_maskz_shuffle_f32x4(__U, __A, __B, 3);<br>
+ return _mm256_maskz_shuffle_f32x4(__U, __A, __B, 4);<br>
}<br>
<br>
__m256d test_mm256_shuffle_f64x2(__m256d __A, __m256d __B) {<br>
// CHECK-LABEL: @test_mm256_shuffle_f64x2<br>
// CHECK: @llvm.x86.avx512.mask.shuf.f64x2<br>
- return _mm256_shuffle_f64x2(__A, __B, 3);<br>
+ return _mm256_shuffle_f64x2(__A, __B, 4);<br>
}<br>
<br>
__m256d test_mm256_mask_shuffle_f64x2(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {<br>
// CHECK-LABEL: @test_mm256_mask_shuffle_f64x2<br>
// CHECK: @llvm.x86.avx512.mask.shuf.f64x2<br>
- return _mm256_mask_shuffle_f64x2(__W, __U, __A, __B, 3);<br>
+ return _mm256_mask_shuffle_f64x2(__W, __U, __A, __B, 4);<br>
}<br>
<br>
__m256d test_mm256_maskz_shuffle_f64x2(__mmask8 __U, __m256d __A, __m256d __B) {<br>
// CHECK-LABEL: @test_mm256_maskz_shuffle_f64x2<br>
// CHECK: @llvm.x86.avx512.mask.shuf.f64x2<br>
- return _mm256_maskz_shuffle_f64x2(__U, __A, __B, 3);<br>
+ return _mm256_maskz_shuffle_f64x2(__U, __A, __B, 4);<br>
}<br>
<br>
__m256i test_mm256_shuffle_i32x4(__m256i __A, __m256i __B) {<br>
// CHECK-LABEL: @test_mm256_shuffle_i32x4<br>
// CHECK: @llvm.x86.avx512.mask.shuf.i32x4<br>
- return _mm256_shuffle_i32x4(__A, __B, 3);<br>
+ return _mm256_shuffle_i32x4(__A, __B, 4);<br>
}<br>
<br>
__m256i test_mm256_mask_shuffle_i32x4(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {<br>
// CHECK-LABEL: @test_mm256_mask_shuffle_i32x4<br>
// CHECK: @llvm.x86.avx512.mask.shuf.i32x4<br>
- return _mm256_mask_shuffle_i32x4(__W, __U, __A, __B, 3);<br>
+ return _mm256_mask_shuffle_i32x4(__W, __U, __A, __B, 4);<br>
}<br>
<br>
__m256i test_mm256_maskz_shuffle_i32x4(__mmask8 __U, __m256i __A, __m256i __B) {<br>
// CHECK-LABEL: @test_mm256_maskz_shuffle_i32x4<br>
// CHECK: @llvm.x86.avx512.mask.shuf.i32x4<br>
- return _mm256_maskz_shuffle_i32x4(__U, __A, __B, 3);<br>
+ return _mm256_maskz_shuffle_i32x4(__U, __A, __B, 4);<br>
}<br>
<br>
__m256i test_mm256_shuffle_i64x2(__m256i __A, __m256i __B) {<br>
// CHECK-LABEL: @test_mm256_shuffle_i64x2<br>
// CHECK: @llvm.x86.avx512.mask.shuf.i64x2<br>
- return _mm256_shuffle_i64x2(__A, __B, 3);<br>
+ return _mm256_shuffle_i64x2(__A, __B, 4);<br>
}<br>
<br>
__m256i test_mm256_mask_shuffle_i64x2(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {<br>
// CHECK-LABEL: @test_mm256_mask_shuffle_i64x2<br>
// CHECK: @llvm.x86.avx512.mask.shuf.i64x2<br>
- return _mm256_mask_shuffle_i64x2(__W, __U, __A, __B, 3);<br>
+ return _mm256_mask_shuffle_i64x2(__W, __U, __A, __B, 4);<br>
}<br>
<br>
__m256i test_mm256_maskz_shuffle_i64x2(__mmask8 __U, __m256i __A, __m256i __B) {<br>
// CHECK-LABEL: @test_mm256_maskz_shuffle_i64x2<br>
// CHECK: @llvm.x86.avx512.mask.shuf.i64x2<br>
- return _mm256_maskz_shuffle_i64x2(__U, __A, __B, 3);<br>
+ return _mm256_maskz_shuffle_i64x2(__U, __A, __B, 4);<br>
}<br>
<br>
__m128d test_mm_mask_shuffle_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {<br>
// CHECK-LABEL: @test_mm_mask_shuffle_pd<br>
// CHECK: @llvm.x86.avx512.mask.shuf.pd.128<br>
- return _mm_mask_shuffle_pd(__W, __U, __A, __B, 3);<br>
+ return _mm_mask_shuffle_pd(__W, __U, __A, __B, 4);<br>
}<br>
<br>
__m128d test_mm_maskz_shuffle_pd(__mmask8 __U, __m128d __A, __m128d __B) {<br>
// CHECK-LABEL: @test_mm_maskz_shuffle_pd<br>
// CHECK: @llvm.x86.avx512.mask.shuf.pd.128<br>
- return _mm_maskz_shuffle_pd(__U, __A, __B, 3);<br>
+ return _mm_maskz_shuffle_pd(__U, __A, __B, 4);<br>
}<br>
<br>
__m256d test_mm256_mask_shuffle_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {<br>
// CHECK-LABEL: @test_mm256_mask_shuffle_pd<br>
// CHECK: @llvm.x86.avx512.mask.shuf.pd.256<br>
- return _mm256_mask_shuffle_pd(__W, __U, __A, __B, 3);<br>
+ return _mm256_mask_shuffle_pd(__W, __U, __A, __B, 4);<br>
}<br>
<br>
__m256d test_mm256_maskz_shuffle_pd(__mmask8 __U, __m256d __A, __m256d __B) {<br>
// CHECK-LABEL: @test_mm256_maskz_shuffle_pd<br>
// CHECK: @llvm.x86.avx512.mask.shuf.pd.256<br>
- return _mm256_maskz_shuffle_pd(__U, __A, __B, 3);<br>
+ return _mm256_maskz_shuffle_pd(__U, __A, __B, 4);<br>
}<br>
<br>
__m128 test_mm_mask_shuffle_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {<br>
<br>
<br>
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<br></blockquote></div><br><br clear="all"><div><br></div>-- <br><div class="gmail_signature">~Craig</div>
</div>