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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Hi ,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Yes, I saw the thread</span><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">. <o:p></o:p></span></p>
<p class="MsoNormal"><a name="_MailEndCompose"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">We have an internal discussion on this subject.<o:p></o:p></span></a></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Regards,
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Michael Zuckerman
<o:p></o:p></span></p>
<p class="MsoNormal"><a name="_____replyseparator"></a><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> thakis@google.com [mailto:thakis@google.com]
<b>On Behalf Of </b>Nico Weber<br>
<b>Sent:</b> Monday, May 16, 2016 22:06<br>
<b>To:</b> Zuckerman, Michael <michael.zuckerman@intel.com><br>
<b>Cc:</b> cfe-commits <cfe-commits@lists.llvm.org><br>
<b>Subject:</b> Re: r269680 - [Clang][AVX512] completing missing intrinsics for [vpabs] instruction set<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Hi Michael,<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">have you see then trhead "The intrinsics headers (especially avx512) are too big. What to do about it?"? Can you maybe comment on it?<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Thanks,<o:p></o:p></p>
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<p class="MsoNormal">Nico<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">On Mon, May 16, 2016 at 2:57 PM, Michael Zuckerman via cfe-commits <<a href="mailto:cfe-commits@lists.llvm.org" target="_blank">cfe-commits@lists.llvm.org</a>> wrote:<o:p></o:p></p>
<blockquote style="border:none;border-left:solid #CCCCCC 1.0pt;padding:0cm 0cm 0cm 6.0pt;margin-left:4.8pt;margin-right:0cm">
<p class="MsoNormal">Author: mzuckerm<br>
Date: Mon May 16 13:57:24 2016<br>
New Revision: 269680<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=269680&view=rev" target="_blank">
http://llvm.org/viewvc/llvm-project?rev=269680&view=rev</a><br>
Log:<br>
[Clang][AVX512] completing missing intrinsics for [vpabs] instruction set<br>
<br>
Differential Revision: <a href="http://reviews.llvm.org/D20069" target="_blank">http://reviews.llvm.org/D20069</a><br>
<br>
Modified:<br>
cfe/trunk/lib/Headers/avx512fintrin.h<br>
cfe/trunk/test/CodeGen/avx512f-builtins.c<br>
<br>
Modified: cfe/trunk/lib/Headers/avx512fintrin.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=269680&r1=269679&r2=269680&view=diff" target="_blank">
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=269680&r1=269679&r2=269680&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/lib/Headers/avx512fintrin.h (original)<br>
+++ cfe/trunk/lib/Headers/avx512fintrin.h Mon May 16 13:57:24 2016<br>
@@ -1631,6 +1631,23 @@ _mm512_abs_epi64(__m512i __A)<br>
(__mmask8) -1);<br>
}<br>
<br>
+static __inline__ __m512i __DEFAULT_FN_ATTRS<br>
+_mm512_mask_abs_epi64 (__m512i __W, __mmask8 __U, __m512i __A)<br>
+{<br>
+ return (__m512i) __builtin_ia32_pabsq512_mask ((__v8di) __A,<br>
+ (__v8di) __W,<br>
+ (__mmask8) __U);<br>
+}<br>
+<br>
+static __inline__ __m512i __DEFAULT_FN_ATTRS<br>
+_mm512_maskz_abs_epi64 (__mmask8 __U, __m512i __A)<br>
+{<br>
+ return (__m512i) __builtin_ia32_pabsq512_mask ((__v8di) __A,<br>
+ (__v8di)<br>
+ _mm512_setzero_si512 (),<br>
+ (__mmask8) __U);<br>
+}<br>
+<br>
static __inline __m512i __DEFAULT_FN_ATTRS<br>
_mm512_abs_epi32(__m512i __A)<br>
{<br>
@@ -1640,6 +1657,23 @@ _mm512_abs_epi32(__m512i __A)<br>
(__mmask16) -1);<br>
}<br>
<br>
+static __inline__ __m512i __DEFAULT_FN_ATTRS<br>
+_mm512_mask_abs_epi32 (__m512i __W, __mmask16 __U, __m512i __A)<br>
+{<br>
+ return (__m512i) __builtin_ia32_pabsd512_mask ((__v16si) __A,<br>
+ (__v16si) __W,<br>
+ (__mmask16) __U);<br>
+}<br>
+<br>
+static __inline__ __m512i __DEFAULT_FN_ATTRS<br>
+_mm512_maskz_abs_epi32 (__mmask16 __U, __m512i __A)<br>
+{<br>
+ return (__m512i) __builtin_ia32_pabsd512_mask ((__v16si) __A,<br>
+ (__v16si)<br>
+ _mm512_setzero_si512 (),<br>
+ (__mmask16) __U);<br>
+}<br>
+<br>
static __inline__ __m128 __DEFAULT_FN_ATTRS<br>
_mm_mask_add_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {<br>
return (__m128) __builtin_ia32_addss_round_mask ((__v4sf) __A,<br>
<br>
Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=269680&r1=269679&r2=269680&view=diff" target="_blank">
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=269680&r1=269679&r2=269680&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/avx512f-builtins.c (original)<br>
+++ cfe/trunk/test/CodeGen/avx512f-builtins.c Mon May 16 13:57:24 2016<br>
@@ -6574,3 +6574,30 @@ __m512 test_mm512_set_ps (float __A, flo<br>
__I, __J, __K, __L, __M, __N, __O, __P);<br>
}<br>
<br>
+__m512i test_mm512_mask_abs_epi64 (__m512i __W, __mmask8 __U, __m512i __A)<br>
+{<br>
+ // CHECK-LABEL: @test_mm512_mask_abs_epi64<br>
+ // CHECK: @llvm.x86.avx512.mask.pabs.q.512<br>
+ return _mm512_mask_abs_epi64 (__W,__U,__A);<br>
+}<br>
+<br>
+__m512i test_mm512_maskz_abs_epi64 (__mmask8 __U, __m512i __A)<br>
+{<br>
+ // CHECK-LABEL: @test_mm512_maskz_abs_epi64<br>
+ // CHECK: @llvm.x86.avx512.mask.pabs.q.512<br>
+ return _mm512_maskz_abs_epi64 (__U,__A);<br>
+}<br>
+<br>
+__m512i test_mm512_mask_abs_epi32 (__m512i __W, __mmask16 __U, __m512i __A)<br>
+{<br>
+ // CHECK-LABEL: @test_mm512_mask_abs_epi32<br>
+ // CHECK: @llvm.x86.avx512.mask.pabs.d.512<br>
+ return _mm512_mask_abs_epi32 (__W,__U,__A);<br>
+}<br>
+<br>
+__m512i test_mm512_maskz_abs_epi32 (__mmask16 __U, __m512i __A)<br>
+{<br>
+ // CHECK-LABEL: @test_mm512_maskz_abs_epi32<br>
+ // CHECK: @llvm.x86.avx512.mask.pabs.d.512<br>
+ return _mm512_maskz_abs_epi32 (__U,__A);<br>
+}<br>
<br>
<br>
_______________________________________________<br>
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<a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits" target="_blank">http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits</a><o:p></o:p></p>
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