<div dir="ltr">Do we really need -O3 in this test?</div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Nov 17, 2014 at 8:34 AM, Chad Rosier <span dir="ltr"><<a href="mailto:mcrosier@codeaurora.org" target="_blank">mcrosier@codeaurora.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: mcrosier<br>
Date: Mon Nov 17 10:34:47 2014<br>
New Revision: 222144<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=222144&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=222144&view=rev</a><br>
Log:<br>
[Reassociate] Update test cases due to r222142.<br>
<br>
Modified:<br>
    cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c<br>
    cfe/trunk/test/CodeGen/bmi-builtins.c<br>
    cfe/trunk/test/CodeGen/builtins-arm-exclusive.c<br>
<br>
Modified: cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c?rev=222144&r1=222143&r2=222144&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c?rev=222144&r1=222143&r2=222144&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c (original)<br>
+++ cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c Mon Nov 17 10:34:47 2014<br>
@@ -8172,13 +8172,13 @@ int64_t test_vcltzd_s64(int64_t a) {<br>
<br>
 int64_t test_vtstd_s64(int64_t a, int64_t b) {<br>
 // CHECK-LABEL: test_vtstd_s64<br>
-// CHECK: {{cmtst d[0-9]+, d[0-9]+, d[0-9]+|tst x1, x0}}<br>
+// CHECK: {{cmtst d[0-9]+, d[0-9]+, d[0-9]+|tst x0, x1}}<br>
   return (int64_t)vtstd_s64(a, b);<br>
 }<br>
<br>
 uint64_t test_vtstd_u64(uint64_t a, uint64_t b) {<br>
 // CHECK-LABEL: test_vtstd_u64<br>
-// CHECK: {{cmtst d[0-9]+, d[0-9]+, d[0-9]+|tst x1, x0}}<br>
+// CHECK: {{cmtst d[0-9]+, d[0-9]+, d[0-9]+|tst x0, x1}}<br>
   return (uint64_t)vtstd_u64(a, b);<br>
 }<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/bmi-builtins.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/bmi-builtins.c?rev=222144&r1=222143&r2=222144&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/bmi-builtins.c?rev=222144&r1=222143&r2=222144&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/bmi-builtins.c (original)<br>
+++ cfe/trunk/test/CodeGen/bmi-builtins.c Mon Nov 17 10:34:47 2014<br>
@@ -20,7 +20,7 @@ unsigned short test__tzcnt_u16(unsigned<br>
<br>
 unsigned int test__andn_u32(unsigned int __X, unsigned int __Y) {<br>
   // CHECK: [[DEST:%.*]] = xor i32 %{{.*}}, -1<br>
-  // CHECK-NEXT: %{{.*}} = and i32 %{{.*}}, [[DEST]]<br>
+  // CHECK-NEXT: %{{.*}} = and i32 [[DEST]], %{{.*}}<br>
   return __andn_u32(__X, __Y);<br>
 }<br>
<br>
@@ -54,7 +54,7 @@ unsigned int test__tzcnt_u32(unsigned in<br>
<br>
 unsigned long long test__andn_u64(unsigned long __X, unsigned long __Y) {<br>
   // CHECK: [[DEST:%.*]] = xor i64 %{{.*}}, -1<br>
-  // CHECK-NEXT: %{{.*}} = and i64 %{{.*}}, [[DEST]]<br>
+  // CHECK-NEXT: %{{.*}} = and i64 [[DEST]], %{{.*}}<br>
   return __andn_u64(__X, __Y);<br>
 }<br>
<br>
@@ -95,7 +95,7 @@ unsigned short test_tzcnt_u16(unsigned s<br>
<br>
 unsigned int test_andn_u32(unsigned int __X, unsigned int __Y) {<br>
   // CHECK: [[DEST:%.*]] = xor i32 %{{.*}}, -1<br>
-  // CHECK-NEXT: %{{.*}} = and i32 %{{.*}}, [[DEST]]<br>
+  // CHECK-NEXT: %{{.*}} = and i32 [[DEST]], %{{.*}}<br>
   return _andn_u32(__X, __Y);<br>
 }<br>
<br>
@@ -130,7 +130,7 @@ unsigned int test_tzcnt_u32(unsigned int<br>
<br>
 unsigned long long test_andn_u64(unsigned long __X, unsigned long __Y) {<br>
   // CHECK: [[DEST:%.*]] = xor i64 %{{.*}}, -1<br>
-  // CHECK-NEXT: %{{.*}} = and i64 %{{.*}}, [[DEST]]<br>
+  // CHECK-NEXT: %{{.*}} = and i64 [[DEST]], %{{.*}}<br>
   return _andn_u64(__X, __Y);<br>
 }<br>
<br>
<br>
Modified: cfe/trunk/test/CodeGen/builtins-arm-exclusive.c<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm-exclusive.c?rev=222144&r1=222143&r2=222144&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm-exclusive.c?rev=222144&r1=222143&r2=222144&view=diff</a><br>
==============================================================================<br>
--- cfe/trunk/test/CodeGen/builtins-arm-exclusive.c (original)<br>
+++ cfe/trunk/test/CodeGen/builtins-arm-exclusive.c Mon Nov 17 10:34:47 2014<br>
@@ -94,7 +94,7 @@ int test_ldrex(char *addr, long long *ad<br>
 // CHECK: [[RESHI64:%.*]] = zext i32 [[RESHI]] to i64<br>
 // CHECK: [[RESLO64:%.*]] = zext i32 [[RESLO]] to i64<br>
 // CHECK: [[RESHIHI:%.*]] = shl nuw i64 [[RESHI64]], 32<br>
-// CHECK: [[INTRES:%.*]] = or i64 [[RESHIHI]], [[RESLO64]]<br>
+// CHECK: [[INTRES:%.*]] = or i64 [[RESLO64]], [[RESHIHI]]<br>
 // CHECK: bitcast i64 [[INTRES]] to double<br>
<br>
 // CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldxr.p0i64(i64* [[ADDR64]])<br>
@@ -178,7 +178,7 @@ int test_ldaex(char *addr, long long *ad<br>
 // CHECK: [[RESHI64:%.*]] = zext i32 [[RESHI]] to i64<br>
 // CHECK: [[RESLO64:%.*]] = zext i32 [[RESLO]] to i64<br>
 // CHECK: [[RESHIHI:%.*]] = shl nuw i64 [[RESHI64]], 32<br>
-// CHECK: [[INTRES:%.*]] = or i64 [[RESHIHI]], [[RESLO64]]<br>
+// CHECK: [[INTRES:%.*]] = or i64 [[RESLO64]], [[RESHIHI]]<br>
 // CHECK: bitcast i64 [[INTRES]] to double<br>
<br>
 // CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldaxr.p0i64(i64* [[ADDR64]])<br>
@@ -323,7 +323,7 @@ __int128 test_ldrex_128(__int128 *addr)<br>
 // CHECK-ARM64: [[RESHI64:%.*]] = zext i64 [[RESHI]] to i128<br>
 // CHECK-ARM64: [[RESLO64:%.*]] = zext i64 [[RESLO]] to i128<br>
 // CHECK-ARM64: [[RESHIHI:%.*]] = shl nuw i128 [[RESHI64]], 64<br>
-// CHECK-ARM64: [[INTRES:%.*]] = or i128 [[RESHIHI]], [[RESLO64]]<br>
+// CHECK-ARM64: [[INTRES:%.*]] = or i128 [[RESLO64]], [[RESHIHI]]<br>
 // CHECK-ARM64: ret i128 [[INTRES]]<br>
 }<br>
<br>
@@ -349,7 +349,7 @@ __int128 test_ldaex_128(__int128 *addr)<br>
 // CHECK-ARM64: [[RESHI64:%.*]] = zext i64 [[RESHI]] to i128<br>
 // CHECK-ARM64: [[RESLO64:%.*]] = zext i64 [[RESLO]] to i128<br>
 // CHECK-ARM64: [[RESHIHI:%.*]] = shl nuw i128 [[RESHI64]], 64<br>
-// CHECK-ARM64: [[INTRES:%.*]] = or i128 [[RESHIHI]], [[RESLO64]]<br>
+// CHECK-ARM64: [[INTRES:%.*]] = or i128 [[RESLO64]], [[RESHIHI]]<br>
 // CHECK-ARM64: ret i128 [[INTRES]]<br>
 }<br>
<br>
<br>
<br>
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</blockquote></div><br></div>