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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoPlainText>Hi Bill and Tim,<o:p></o:p></p><p class=MsoPlainText><o:p> </o:p></p><p class=MsoPlainText>Thanks for merging all the patches to branch 3.4. We will have a couple more coming this week to complete Neon intrinsics implementation.<o:p></o:p></p><p class=MsoPlainText><o:p> </o:p></p><p class=MsoPlainText>Here are the patches from me that need to go to 3.4 branch:<o:p></o:p></p><p class=MsoPlainText>Clang:<o:p></o:p></p><p class=MsoPlainText>r196206 Fixed vcopy_laneq_f64 intrinsic implementation<o:p></o:p></p><p class=MsoPlainText>196153: Implemented vcopy_lane patterns using scalar DUP instruction<o:p></o:p></p><p class=MsoPlainText>LLVM:<o:p></o:p></p><p class=MsoPlainText>196151 Implemented vcopy_lane patterns using scalar DUP instruction<o:p></o:p></p><p class=MsoPlainText><o:p> </o:p></p><p class=MsoPlainText>Thank you,<o:p></o:p></p><p class=MsoPlainText>Ana.<o:p></o:p></p><div><div style='border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0in 0in 0in'><p class=MsoNormal><b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> Bill Wendling [mailto:isanbard@gmail.com] <br><b>Sent:</b> Saturday, November 30, 2013 8:40 PM<br><b>To:</b> Jiangning Liu<br><b>Cc:</b> Ana Pazos; Jiangning Liu; llvm-commits; cfe-commits<br><b>Subject:</b> Re: [PATCH][AArch64] request to push AArch64 patches to release 3.4 branch<o:p></o:p></span></p></div></div><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Hi Jiangning,<o:p></o:p></p><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>Thanks for the list! I added them into the 3.4 release branch. Please let me know if there are any I missed.<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>-bw<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><div><div><p class=MsoNormal>On Nov 29, 2013, at 6:36 PM, Jiangning Liu <<a href="mailto:liujiangning1@gmail.com">liujiangning1@gmail.com</a>> wrote:<o:p></o:p></p></div><p class=MsoNormal><br><br><o:p></o:p></p><div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'>Hi Bill,<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'><o:p> </o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'>Now we have a couple new patches for 3.4 release, so could you please help to merge them into the branch?<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'><o:p> </o:p></span></p><table class=MsoNormalTable border=0 cellspacing=0 cellpadding=0><tr style='height:13.8pt'><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>r195068<o:p></o:p></p></td><td style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>Clean up predefined macros for AArch64 to follow ACLE 2.0.<o:p></o:p></p></td></tr><tr style='height:13.8pt'><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>r195069 r195071<o:p></o:p></p></td><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>All crypto intrinsics should be unavailable when crypto feature is not enabled <o:p></o:p></p></td></tr><tr style='height:13.8pt'><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>r195073 r195074<o:p></o:p></p></td><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>Implement SISD intrinsics for vget_high and vget_low<o:p></o:p></p></td></tr><tr style='height:13.8pt'><td style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>r195713<o:p></o:p></p></td><td style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>Implement 128 bit register copy with NEON.<o:p></o:p></p></td></tr><tr style='height:13.8pt'><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>r195903<o:p></o:p></p></td><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>*** Fix the problem that AArch64 Post-index LD4 lane is decoded incorrectly<o:p></o:p></p></td></tr><tr style='height:13.8pt'><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>r195844 r195843 r195905 r195932<o:p></o:p></p></td><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>*** Fix the failure exposed by checking constant integer argument range<o:p></o:p></p></td></tr><tr style='height:13.8pt'><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>r195937<o:p></o:p></p></td><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>Add missing intrinsic vcombine_f64<o:p></o:p></p></td></tr><tr style='height:13.8pt'><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>r195936<o:p></o:p></p></td><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>*** Fix An assertion failure caused by disassembling AArch64 SHLL instruction<o:p></o:p></p></td></tr><tr style='height:13.8pt'><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>r195938 r195939 r195940<o:p></o:p></p></td><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>Add missing intrinsic bsl_f64<o:p></o:p></p></td></tr><tr style='height:13.8pt'><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>r195941 r195942<o:p></o:p></p></td><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>*** The pattern match should check the range of the immediate<o:p></o:p></p></td></tr><tr style='height:13.8pt'><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>r195943<o:p></o:p></p></td><td valign=bottom style='padding:.75pt .75pt .75pt .75pt;height:13.8pt'><p class=MsoNormal>*** Some ACLE intrinsics in arm_neon.h return float32 instead of float64.<o:p></o:p></p></td></tr></table><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'><o:p> </o:p></span></p></div><div><p class=MsoNormal style='margin-bottom:12.0pt'><span style='font-family:"Arial","sans-serif"'>The ones marked with "***" are critical ones because they are bug fixes either for MCLayer or ACLE, and they should go into branch with the high priority.<br><br>Ideally we want all of them go into branch, because they are combined all together as a big feature for AArch64 NEON implementation.<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'>Thanks,<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'>-Jiangning<o:p></o:p></span></p></div><div><p class=MsoNormal style='margin-bottom:12.0pt'><span style='font-family:"Arial","sans-serif"'><o:p> </o:p></span></p></div></div><div><p class=MsoNormal style='margin-bottom:12.0pt'><o:p> </o:p></p><div><p class=MsoNormal>2013/11/26 Bill Wendling <<a href="mailto:isanbard@gmail.com" target="_blank">isanbard@gmail.com</a>><o:p></o:p></p><div><p class=MsoNormal>Sure. done.<span class=hoenzb><span style='color:#888888'><o:p></o:p></span></span></p><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal><span style='color:#888888'>-bw<o:p></o:p></span></p></div><div><div><p class=MsoNormal><o:p> </o:p></p><div><div><p class=MsoNormal>On Nov 25, 2013, at 8:32 PM, Jiangning Liu <<a href="mailto:liujiangning1@gmail.com" target="_blank">liujiangning1@gmail.com</a>> wrote:<o:p></o:p></p></div><p class=MsoNormal><br><br><o:p></o:p></p><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-family:"Courier New"'>Bill,</span><o:p></o:p></p><h1 style='mso-margin-top-alt:9.0pt;margin-right:.75pt;margin-bottom:6.75pt;margin-left:0in'><span style='font-size:12.0pt;font-family:"Courier New";font-weight:normal'>Can you merge r195716 to branch 3.4 as well?</span><span style='font-family:"Arial","sans-serif"'><o:p></o:p></span></h1><h1 style='mso-margin-top-alt:9.0pt;margin-right:.75pt;margin-bottom:6.75pt;margin-left:0in'><span style='font-size:12.0pt;font-family:"Courier New";font-weight:normal'>Thanks,</span><span style='font-family:"Arial","sans-serif"'><o:p></o:p></span></h1><h1 style='mso-margin-top-alt:9.0pt;margin-right:.75pt;margin-bottom:6.75pt;margin-left:0in'><span style='font-size:12.0pt;font-family:"Courier New";font-weight:normal'>-Jiangning</span><span style='font-family:"Arial","sans-serif"'><o:p></o:p></span></h1></div></div><div><p class=MsoNormal style='margin-bottom:12.0pt'><o:p> </o:p></p><div><p class=MsoNormal>2013/11/26 Bill Wendling <<a href="mailto:isanbard@gmail.com" target="_blank">isanbard@gmail.com</a>><o:p></o:p></p><div><p class=MsoNormal>Sure. Done.<span style='color:#888888'><o:p></o:p></span></p><div><p class=MsoNormal><span style='color:#888888'><o:p> </o:p></span></p></div><div><p class=MsoNormal><span style='color:#888888'>-bw<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='color:#888888'><o:p> </o:p></span></p></div></div><div><div><p class=MsoNormal style='margin-bottom:12.0pt'><o:p> </o:p></p><div><p class=MsoNormal>On Mon, Nov 25, 2013 at 9:59 AM, Ana Pazos <<a href="mailto:apazos@codeaurora.org" target="_blank">apazos@codeaurora.org</a>> wrote:<o:p></o:p></p><p class=MsoNormal>Thank you Bill,<br><br>We have a fix from Hao that should also go into branch 3.4 (it's a fix of<br>encoding error for ld/st instruction): r195591<br><br>Can you merge it too, please.<br><br>Thanks,<br>Ana.<o:p></o:p></p><div><p class=MsoNormal style='margin-bottom:12.0pt'><br>-----Original Message-----<br>From: Bill Wendling [mailto:<a href="mailto:isanbard@gmail.com" target="_blank">isanbard@gmail.com</a>]<br>Sent: Sunday, November 24, 2013 9:44 PM<br>To: Tim Northover<br>Cc: Ana Pazos; llvm-commits; <a href="mailto:cfe-commits@cs.uiuc.edu" target="_blank">cfe-commits@cs.uiuc.edu</a><br>Subject: Re: [PATCH][AArch64] request to push AArch64 patches to release 3.4<br>branch<br><br>Sure. Merged.<br><br>-bw<br><br>On Nov 22, 2013, at 10:53 AM, Tim Northover <<a href="mailto:t.p.northover@gmail.com" target="_blank">t.p.northover@gmail.com</a>> wrote:<br><br>> Hi Ana & Bill,<br>><br>>> Committed revision 195326<br>>> Committed revision 195329<br>>> Committed revision 195327<br>>> Committed revision 195330<br>><br>> I'm happy for these to go in. The interested parties are keen and they<br>> should only affect AArch64 with -mattr=+neon, which I don't think is<br>> being widely used at the moment (and itself almost certainly won't be<br>> made worse).<br>><br>> Cheers.<br>><br>> Tim.<br><br><o:p></o:p></p></div></div><p class=MsoNormal><o:p> </o:p></p></div></div><p class=MsoNormal style='margin-bottom:12.0pt'><br>_______________________________________________<br>cfe-commits mailing list<br><a href="mailto:cfe-commits@cs.uiuc.edu" target="_blank">cfe-commits@cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits</a><o:p></o:p></p></div><p class=MsoNormal><br><br clear=all><o:p></o:p></p><div><p class=MsoNormal><o:p> </o:p></p></div><p class=MsoNormal>-- <o:p></o:p></p><div><p class=MsoNormal><span style='font-family:"Courier New"'>Thanks,</span><o:p></o:p></p><div><p class=MsoNormal><span style='font-family:"Courier New"'>-Jiangning</span><o:p></o:p></p></div></div></div></div><p class=MsoNormal><o:p> </o:p></p></div></div></div></div><p class=MsoNormal><br><br clear=all><br>-- <o:p></o:p></p><div><p class=MsoNormal><span style='font-family:"Courier New"'>Thanks,</span><o:p></o:p></p><div><p class=MsoNormal><span style='font-family:"Courier New"'>-Jiangning</span><o:p></o:p></p></div></div></div></div><p class=MsoNormal><o:p> </o:p></p></div></div></body></html>