<div dir="ltr">Oh yeah. I forgot that that requires additional changes. I'll do it later tonight. Thanks</div><div class="gmail_extra"><br><br><div class="gmail_quote">On Tue, Aug 20, 2013 at 6:51 AM, Rafael Espíndola <span dir="ltr"><<a href="mailto:rafael.espindola@gmail.com" target="_blank">rafael.espindola@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Don't you want to add a -mavx512 (or -mavx-512) option too?<br>
<br>
On 20 August 2013 03:09, Craig Topper <<a href="mailto:craig.topper@gmail.com">craig.topper@gmail.com</a>> wrote:<br>
> Author: ctopper<br>
> Date: Tue Aug 20 02:09:39 2013<br>
> New Revision: 188758<br>
><br>
> URL: <a href="http://llvm.org/viewvc/llvm-project?rev=188758&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=188758&view=rev</a><br>
> Log:<br>
> Add AVX-512 feature flag and knl cpu to clang.<br>
><br>
> Modified:<br>
> cfe/trunk/lib/Basic/Targets.cpp<br>
> cfe/trunk/test/Preprocessor/predefined-arch-macros.c<br>
><br>
> Modified: cfe/trunk/lib/Basic/Targets.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=188758&r1=188757&r2=188758&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=188758&r1=188757&r2=188758&view=diff</a><br>
> ==============================================================================<br>
> --- cfe/trunk/lib/Basic/Targets.cpp (original)<br>
> +++ cfe/trunk/lib/Basic/Targets.cpp Tue Aug 20 02:09:39 2013<br>
> @@ -1570,7 +1570,7 @@ const TargetInfo::AddlRegName AddlRegNam<br>
> // most of the implementation can be shared.<br>
> class X86TargetInfo : public TargetInfo {<br>
> enum X86SSEEnum {<br>
> - NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2<br>
> + NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512<br>
> } SSELevel;<br>
> enum MMX3DNowEnum {<br>
> NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon<br>
> @@ -1675,6 +1675,10 @@ class X86TargetInfo : public TargetInfo<br>
> CK_CoreAVX2,<br>
> //@}<br>
><br>
> + /// \name Knights Landing<br>
> + /// Knights Landing processor.<br>
> + CK_KNL,<br>
> +<br>
> /// \name K6<br>
> /// K6 architecture processors.<br>
> //@{<br>
> @@ -1818,6 +1822,7 @@ public:<br>
> .Case("corei7-avx", CK_Corei7AVX)<br>
> .Case("core-avx-i", CK_CoreAVXi)<br>
> .Case("core-avx2", CK_CoreAVX2)<br>
> + .Case("knl", CK_KNL)<br>
> .Case("k6", CK_K6)<br>
> .Case("k6-2", CK_K6_2)<br>
> .Case("k6-3", CK_K6_3)<br>
> @@ -1892,6 +1897,7 @@ public:<br>
> case CK_Corei7AVX:<br>
> case CK_CoreAVXi:<br>
> case CK_CoreAVX2:<br>
> + case CK_KNL:<br>
> case CK_Athlon64:<br>
> case CK_Athlon64SSE3:<br>
> case CK_AthlonFX:<br>
> @@ -1941,6 +1947,7 @@ void X86TargetInfo::getDefaultFeatures(l<br>
> Features["pclmul"] = false;<br>
> Features["avx"] = false;<br>
> Features["avx2"] = false;<br>
> + Features["avx512"] = false;<br>
> Features["lzcnt"] = false;<br>
> Features["rdrand"] = false;<br>
> Features["bmi"] = false;<br>
> @@ -2024,6 +2031,18 @@ void X86TargetInfo::getDefaultFeatures(l<br>
> setFeatureEnabled(Features, "rtm", true);<br>
> setFeatureEnabled(Features, "fma", true);<br>
> break;<br>
> + case CK_KNL:<br>
> + setFeatureEnabled(Features, "avx512", true);<br>
> + setFeatureEnabled(Features, "aes", true);<br>
> + setFeatureEnabled(Features, "pclmul", true);<br>
> + setFeatureEnabled(Features, "lzcnt", true);<br>
> + setFeatureEnabled(Features, "rdrnd", true);<br>
> + setFeatureEnabled(Features, "f16c", true);<br>
> + setFeatureEnabled(Features, "bmi", true);<br>
> + setFeatureEnabled(Features, "bmi2", true);<br>
> + setFeatureEnabled(Features, "rtm", true);<br>
> + setFeatureEnabled(Features, "fma", true);<br>
> + break;<br>
> case CK_K6:<br>
> case CK_WinChipC6:<br>
> setFeatureEnabled(Features, "mmx", true);<br>
> @@ -2149,6 +2168,11 @@ bool X86TargetInfo::setFeatureEnabled(ll<br>
> Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =<br>
> Features["ssse3"] = Features["sse41"] = Features["sse42"] =<br>
> Features["popcnt"] = Features["avx"] = Features["avx2"] = true;<br>
> + else if (Name == "avx512")<br>
> + Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =<br>
> + Features["ssse3"] = Features["sse41"] = Features["sse42"] =<br>
> + Features["popcnt"] = Features["avx"] = Features["avx2"] =<br>
> + Features["avx512"] = true;<br>
> else if (Name == "fma")<br>
> Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =<br>
> Features["ssse3"] = Features["sse41"] = Features["sse42"] =<br>
> @@ -2191,28 +2215,29 @@ bool X86TargetInfo::setFeatureEnabled(ll<br>
> Features["sse"] = Features["sse2"] = Features["sse3"] =<br>
> Features["ssse3"] = Features["sse41"] = Features["sse42"] =<br>
> Features["sse4a"] = Features["avx"] = Features["avx2"] =<br>
> - Features["fma"] = Features["fma4"] = Features["aes"] =<br>
> - Features["pclmul"] = Features["xop"] = false;<br>
> + Features["avx512"] = Features["fma"] = Features["fma4"] =<br>
> + Features["aes"] = Features["pclmul"] = Features["xop"] = false;<br>
> else if (Name == "sse2")<br>
> Features["sse2"] = Features["sse3"] = Features["ssse3"] =<br>
> Features["sse41"] = Features["sse42"] = Features["sse4a"] =<br>
> - Features["avx"] = Features["avx2"] = Features["fma"] =<br>
> - Features["fma4"] = Features["aes"] = Features["pclmul"] =<br>
> - Features["xop"] = false;<br>
> + Features["avx"] = Features["avx2"] = Features["avx512"] =<br>
> + Features["fma"] = Features["fma4"] = Features["aes"] =<br>
> + Features["pclmul"] = Features["xop"] = false;<br>
> else if (Name == "sse3")<br>
> Features["sse3"] = Features["ssse3"] = Features["sse41"] =<br>
> Features["sse42"] = Features["sse4a"] = Features["avx"] =<br>
> - Features["avx2"] = Features["fma"] = Features["fma4"] =<br>
> - Features["xop"] = false;<br>
> + Features["avx2"] = Features["avx512"] = Features["fma"] =<br>
> + Features["fma4"] = Features["xop"] = false;<br>
> else if (Name == "ssse3")<br>
> Features["ssse3"] = Features["sse41"] = Features["sse42"] =<br>
> - Features["avx"] = Features["avx2"] = Features["fma"] = false;<br>
> + Features["avx"] = Features["avx2"] = Features["avx512"] =<br>
> + Features["fma"] = false;<br>
> else if (Name == "sse4" || Name == "sse4.1")<br>
> Features["sse41"] = Features["sse42"] = Features["avx"] =<br>
> - Features["avx2"] = Features["fma"] = false;<br>
> + Features["avx2"] = Features["avx512"] = Features["fma"] = false;<br>
> else if (Name == "sse4.2")<br>
> Features["sse42"] = Features["avx"] = Features["avx2"] =<br>
> - Features["fma"] = false;<br>
> + Features["avx512"] = Features["fma"] = false;<br>
> else if (Name == "3dnow")<br>
> Features["3dnow"] = Features["3dnowa"] = false;<br>
> else if (Name == "3dnowa")<br>
> @@ -2222,10 +2247,12 @@ bool X86TargetInfo::setFeatureEnabled(ll<br>
> else if (Name == "pclmul")<br>
> Features["pclmul"] = false;<br>
> else if (Name == "avx")<br>
> - Features["avx"] = Features["avx2"] = Features["fma"] =<br>
> - Features["fma4"] = Features["xop"] = false;<br>
> + Features["avx"] = Features["avx2"] = Features["avx512"] =<br>
> + Features["fma"] = Features["fma4"] = Features["xop"] = false;<br>
> else if (Name == "avx2")<br>
> - Features["avx2"] = false;<br>
> + Features["avx2"] = Features["avx512"] = false;<br>
> + else if (Name == "avx512")<br>
> + Features["avx512"] = false;<br>
> else if (Name == "fma")<br>
> Features["fma"] = false;<br>
> else if (Name == "sse4a")<br>
> @@ -2345,6 +2372,7 @@ void X86TargetInfo::HandleTargetFeatures<br>
><br>
> assert(Features[i][0] == '+' && "Invalid target feature!");<br>
> X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)<br>
> + .Case("avx512", AVX512)<br>
> .Case("avx2", AVX2)<br>
> .Case("avx", AVX)<br>
> .Case("sse42", SSE42)<br>
> @@ -2455,6 +2483,9 @@ void X86TargetInfo::getTargetDefines(con<br>
> case CK_CoreAVX2:<br>
> defineCPUMacros(Builder, "corei7");<br>
> break;<br>
> + case CK_KNL:<br>
> + defineCPUMacros(Builder, "knl");<br>
> + break;<br>
> case CK_K6_2:<br>
> Builder.defineMacro("__k6_2__");<br>
> Builder.defineMacro("__tune_k6_2__");<br>
> @@ -2568,6 +2599,8 @@ void X86TargetInfo::getTargetDefines(con<br>
><br>
> // Each case falls through to the previous one here.<br>
> switch (SSELevel) {<br>
> + case AVX512:<br>
> + Builder.defineMacro("__AVX512__");<br>
> case AVX2:<br>
> Builder.defineMacro("__AVX2__");<br>
> case AVX:<br>
> @@ -2592,6 +2625,7 @@ void X86TargetInfo::getTargetDefines(con<br>
><br>
> if (Opts.MicrosoftExt && getTriple().getArch() == llvm::Triple::x86) {<br>
> switch (SSELevel) {<br>
> + case AVX512:<br>
> case AVX2:<br>
> case AVX:<br>
> case SSE42:<br>
> @@ -2635,6 +2669,7 @@ bool X86TargetInfo::hasFeature(StringRef<br>
> .Case("aes", HasAES)<br>
> .Case("avx", SSELevel >= AVX)<br>
> .Case("avx2", SSELevel >= AVX2)<br>
> + .Case("avx512", SSELevel >= AVX512)<br>
> .Case("bmi", HasBMI)<br>
> .Case("bmi2", HasBMI2)<br>
> .Case("fma", HasFMA)<br>
><br>
> Modified: cfe/trunk/test/Preprocessor/predefined-arch-macros.c<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/predefined-arch-macros.c?rev=188758&r1=188757&r2=188758&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/predefined-arch-macros.c?rev=188758&r1=188757&r2=188758&view=diff</a><br>
> ==============================================================================<br>
> --- cfe/trunk/test/Preprocessor/predefined-arch-macros.c (original)<br>
> +++ cfe/trunk/test/Preprocessor/predefined-arch-macros.c Tue Aug 20 02:09:39 2013<br>
> @@ -509,6 +509,7 @@<br>
> // RUN: -target i386-unknown-linux \<br>
> // RUN: | FileCheck %s -check-prefix=CHECK_CORE_AVX2_M32<br>
> // CHECK_CORE_AVX2_M32: #define __AES__ 1<br>
> +// CHECK_CORE_AVX2_M32: #define __AVX2__ 1<br>
> // CHECK_CORE_AVX2_M32: #define __AVX__ 1<br>
> // CHECK_CORE_AVX2_M32: #define __BMI2__ 1<br>
> // CHECK_CORE_AVX2_M32: #define __BMI__ 1<br>
> @@ -536,6 +537,7 @@<br>
> // RUN: -target i386-unknown-linux \<br>
> // RUN: | FileCheck %s -check-prefix=CHECK_CORE_AVX2_M64<br>
> // CHECK_CORE_AVX2_M64: #define __AES__ 1<br>
> +// CHECK_CORE_AVX2_M64: #define __AVX2__ 1<br>
> // CHECK_CORE_AVX2_M64: #define __AVX__ 1<br>
> // CHECK_CORE_AVX2_M64: #define __BMI2__ 1<br>
> // CHECK_CORE_AVX2_M64: #define __BMI__ 1<br>
> @@ -563,6 +565,68 @@<br>
> // CHECK_CORE_AVX2_M64: #define __x86_64 1<br>
> // CHECK_CORE_AVX2_M64: #define __x86_64__ 1<br>
> //<br>
> +// RUN: %clang -march=knl -m32 -E -dM %s -o - 2>&1 \<br>
> +// RUN: -target i386-unknown-linux \<br>
> +// RUN: | FileCheck %s -check-prefix=CHECK_KNL_M32<br>
> +// CHECK_KNL_M32: #define __AES__ 1<br>
> +// CHECK_KNL_M32: #define __AVX2__ 1<br>
> +// CHECK_KNL_M32: #define __AVX512__ 1<br>
> +// CHECK_KNL_M32: #define __AVX__ 1<br>
> +// CHECK_KNL_M32: #define __BMI2__ 1<br>
> +// CHECK_KNL_M32: #define __BMI__ 1<br>
> +// CHECK_KNL_M32: #define __F16C__ 1<br>
> +// CHECK_KNL_M32: #define __FMA__ 1<br>
> +// CHECK_KNL_M32: #define __LZCNT__ 1<br>
> +// CHECK_KNL_M32: #define __MMX__ 1<br>
> +// CHECK_KNL_M32: #define __PCLMUL__ 1<br>
> +// CHECK_KNL_M32: #define __POPCNT__ 1<br>
> +// CHECK_KNL_M32: #define __RDRND__ 1<br>
> +// CHECK_KNL_M32: #define __RTM__ 1<br>
> +// CHECK_KNL_M32: #define __SSE2__ 1<br>
> +// CHECK_KNL_M32: #define __SSE3__ 1<br>
> +// CHECK_KNL_M32: #define __SSE4_1__ 1<br>
> +// CHECK_KNL_M32: #define __SSE4_2__ 1<br>
> +// CHECK_KNL_M32: #define __SSE__ 1<br>
> +// CHECK_KNL_M32: #define __SSSE3__ 1<br>
> +// CHECK_KNL_M32: #define __i386 1<br>
> +// CHECK_KNL_M32: #define __i386__ 1<br>
> +// CHECK_KNL_M32: #define __knl 1<br>
> +// CHECK_KNL_M32: #define __knl__ 1<br>
> +// CHECK_KNL_M32: #define __tune_knl__ 1<br>
> +// CHECK_KNL_M32: #define i386 1<br>
> +// RUN: %clang -march=knl -m64 -E -dM %s -o - 2>&1 \<br>
> +// RUN: -target i386-unknown-linux \<br>
> +// RUN: | FileCheck %s -check-prefix=CHECK_KNL_M64<br>
> +// CHECK_KNL_M64: #define __AES__ 1<br>
> +// CHECK_KNL_M64: #define __AVX2__ 1<br>
> +// CHECK_KNL_M64: #define __AVX512__ 1<br>
> +// CHECK_KNL_M64: #define __AVX__ 1<br>
> +// CHECK_KNL_M64: #define __BMI2__ 1<br>
> +// CHECK_KNL_M64: #define __BMI__ 1<br>
> +// CHECK_KNL_M64: #define __F16C__ 1<br>
> +// CHECK_KNL_M64: #define __FMA__ 1<br>
> +// CHECK_KNL_M64: #define __LZCNT__ 1<br>
> +// CHECK_KNL_M64: #define __MMX__ 1<br>
> +// CHECK_KNL_M64: #define __PCLMUL__ 1<br>
> +// CHECK_KNL_M64: #define __POPCNT__ 1<br>
> +// CHECK_KNL_M64: #define __RDRND__ 1<br>
> +// CHECK_KNL_M64: #define __RTM__ 1<br>
> +// CHECK_KNL_M64: #define __SSE2_MATH__ 1<br>
> +// CHECK_KNL_M64: #define __SSE2__ 1<br>
> +// CHECK_KNL_M64: #define __SSE3__ 1<br>
> +// CHECK_KNL_M64: #define __SSE4_1__ 1<br>
> +// CHECK_KNL_M64: #define __SSE4_2__ 1<br>
> +// CHECK_KNL_M64: #define __SSE_MATH__ 1<br>
> +// CHECK_KNL_M64: #define __SSE__ 1<br>
> +// CHECK_KNL_M64: #define __SSSE3__ 1<br>
> +// CHECK_KNL_M64: #define __amd64 1<br>
> +// CHECK_KNL_M64: #define __amd64__ 1<br>
> +// CHECK_KNL_M64: #define __knl 1<br>
> +// CHECK_KNL_M64: #define __knl__ 1<br>
> +// CHECK_KNL_M64: #define __tune_knl__ 1<br>
> +// CHECK_KNL_M64: #define __x86_64 1<br>
> +// CHECK_KNL_M64: #define __x86_64__ 1<br>
> +//<br>
> // RUN: %clang -march=atom -m32 -E -dM %s -o - 2>&1 \<br>
> // RUN: -target i386-unknown-linux \<br>
> // RUN: | FileCheck %s -check-prefix=CHECK_ATOM_M32<br>
><br>
><br>
> _______________________________________________<br>
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</blockquote></div><br><br clear="all"><div><br></div>-- <br>~Craig
</div>