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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Hi Kevin,<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>I am trying your patch now.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>The first thing I noticed is that the patch does not merge cleanly.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>It seems you do not have Hao’s previous clang commit (<a href="http://llvm.org/viewvc/llvm-project?view=revision&revision=188452">http://llvm.org/viewvc/llvm-project?view=revision&revision=188452</a> -Clang and AArch64 backend patches to support shll/shl and vmovl instructions and ACLE function).<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Can you rebase and repost your patch?<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Thanks,<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Ana.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> cfe-commits-bounces@cs.uiuc.edu [mailto:cfe-commits-bounces@cs.uiuc.edu] <b>On Behalf Of </b>Kevin Qin<br><b>Sent:</b> Monday, August 19, 2013 2:43 AM<br><b>To:</b> Joey Gouly<br><b>Cc:</b> llvm-commits@cs.uiuc.edu; cfe-commits@cs.uiuc.edu<br><b>Subject:</b> Re: [PATCH] Aarch64 Neon ACLE scalar instrinsic name mangling with BHSD suffix<o:p></o:p></span></p><p class=MsoNormal><o:p> </o:p></p><div><p class=MsoNormal>Hi Joey,<o:p></o:p></p><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal> Thanks a lot for your suggestions. I improved my patch as your good advice. I wish to implement some of ACLE intrinsic based on my patch as test, but the full implementation of one ACLE intrinsic need to commit on both llvm and clang. More important thing is, all scalar ACLE intrinsic are classified to different tables, and these tables are implemented in parallel but none of them is accomplished. There are complex dependence among intrinsic and may be rewrite frequently. The main purpose posting this patch at moment is to decrease overlap on such base module and make our parallel development more efficient.<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>Best Regards,<o:p></o:p></p></div><div><p class=MsoNormal>Kevin Qin<o:p></o:p></p></div><div><p class=MsoNormal style='margin-bottom:12.0pt'><o:p> </o:p></p><div><p class=MsoNormal>2013/8/16 Joey Gouly <<a href="mailto:joey.gouly@arm.com" target="_blank">joey.gouly@arm.com</a>><o:p></o:p></p><p class=MsoNormal>Hi Kevin,<br><br>Clang patches should be sent to cfe-commits. I cc’d them in for you.<br><br>You could test this patch by including an ACLE function that you have<br>implemented, that way we can see it works. Or if you are going to submit<br>those soon, maybe it can go in without a test for now. Let’s see what others<br>think about that.<br><br>Just two minor points.<br><br>> +static std::string Insert_BHSD_Suffix(StringRef typestr){<br><br>This should just return a 'char'.<br><br>> +/// Insert proper 'b' 'h' 's' 'd' behind function name if prefix 'S' is<br>used.<br>Can you change that to something like<br> Insert proper 'b', 'h', 's', 'd' suffix if 'S' prefix is used.<br><br>Thanks<br><br>From: <a href="mailto:llvm-commits-bounces@cs.uiuc.edu">llvm-commits-bounces@cs.uiuc.edu</a><br>[mailto:<a href="mailto:llvm-commits-bounces@cs.uiuc.edu">llvm-commits-bounces@cs.uiuc.edu</a>] On Behalf Of Kevin Qin<br>Sent: 16 August 2013 10:46<br>To: <a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a><br>Subject: [PATCH] Aarch64 Neon ACLE scalar instrinsic name mangling with BHSD<br>suffix<o:p></o:p></p><div><div><p class=MsoNormal style='margin-bottom:12.0pt'><br>This patch is used to add ‘bhsd’ suffix in Neon ACLE scalar function name.<br>1. A new type prefix ‘S’ is defined in<br>tools/clang/include/clang/Basic/<a href="http://arm_neon.td" target="_blank">arm_neon.td</a>, which is used to mark whether<br>enable ‘bhsd’ suffix mangle.<br>2. If prefix ‘S’ is found before data type, proper suffix will be added<br>according below rule:<br>Data Type Suffix<br> i8 -> b<br> i16 -> h<br> i32 f32 -> s<br> i64 f64 -> d<br> <br>For example,<br>If we define a new ACLE function in <a href="http://arm_neon.td" target="_blank">arm_neon.td</a> like:<br> <br>def FABD : SInst<”vabd”, “sss”, “ScSsSiSlSfSd”><br> <br>Then, rebuild llvm. We would see below in<br>INSTALL_PATH/lib/clang/3.4/include/arm_neon.h<br> <br>__ai int8_t vabdb_s8(int8_t __a, int8_t __b) {<br> return (int8_t)__builtin_neon_vabdb_s8(__a, __b); }<br>__ai int16_t vabdh_s16(int16_t __a, int16_t __b) {<br> return (int16_t)__builtin_neon_vabdh_s8(__a, __b); }<br>…<br> <br>Proper suffix is inserted in both ACLE intrinsics and builtin functions.<br> <br>Because this patch only works on llvm building time, so I have no idea on<br>writing test case for this patch. Fortunately, this patch won’t effect on<br>any already defined ACLE functions, for its function depending on the new<br>defined prefix ‘S’. So It is safe for current system and is developed to<br>help implement new scalar ACLE intrinsics in parallel.<br> <br>You can see each scalar ACLE function corresponds to an unique builtin<br>function. At beginning, I planned to let series of ACLE functions with the<br>same semantics reuse one builtin function. But this would introduce extra<br>unnecessary convert expression in IR, for different data types have<br>different data width. If I promote all data types to i64 and use single<br>builtin function, then there will be only an i64 version builtin function<br>existing in IR. Though I can add extra arg in builtin function to record the<br>original data type, but extra data convert IR(sign extension before call and<br>truncation after call) still exists. This will increase the difficulty in<br>coding lower patterns in backend.<br> <br><br><br><o:p></o:p></p></div></div></div><p class=MsoNormal><br><br clear=all><o:p></o:p></p><div><p class=MsoNormal><o:p> </o:p></p></div><p class=MsoNormal>-- <o:p></o:p></p><div><p class=MsoNormal>Best Regards,<o:p></o:p></p><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>Kevin Qin<o:p></o:p></p></div></div></div></div></div></body></html>