[PATCH] D64737: RISCV: Add support for floating point registers in inlineasm
Simon Cook via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Jul 15 06:42:36 PDT 2019
simoncook added a comment.
As an aside, I've noticed a codegen issue when using floating point clobber lists, resulting in the implicit-defs not being added to INLINEASM instructions. I'm working on a fix for that now and will submit a second patch shortly.
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