r361967 - [mips] Check argument for __builtin_msa_ctcmsa / __builtin_msa_cfcmsa

Simon Atanasyan via cfe-commits cfe-commits at lists.llvm.org
Wed May 29 07:59:32 PDT 2019


Author: atanasyan
Date: Wed May 29 07:59:32 2019
New Revision: 361967

URL: http://llvm.org/viewvc/llvm-project?rev=361967&view=rev
Log:
[mips] Check argument for __builtin_msa_ctcmsa / __builtin_msa_cfcmsa

The `__builtin_msa_ctcmsa` and `__builtin_msa_cfcmsa` builtins are mapped
to the `ctcmsa` and `cfcmsa` instructions respectively. While MSA
control registers have indexes in 0..7 range, the instructions accept
register index in 0..31 range [1].

[1] MIPS Architecture for Programmers Volume IV-j:
    The MIPS64 SIMD Architecture Module
https://www.mips.com/?do-download=the-mips64-simd-architecture-module

Modified:
    cfe/trunk/lib/Sema/SemaChecking.cpp
    cfe/trunk/test/CodeGen/builtins-mips-msa-error.c

Modified: cfe/trunk/lib/Sema/SemaChecking.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Sema/SemaChecking.cpp?rev=361967&r1=361966&r2=361967&view=diff
==============================================================================
--- cfe/trunk/lib/Sema/SemaChecking.cpp (original)
+++ cfe/trunk/lib/Sema/SemaChecking.cpp Wed May 29 07:59:32 2019
@@ -3034,6 +3034,8 @@ bool Sema::CheckMipsBuiltinFunctionCall(
   // These intrinsics take an unsigned 5 bit immediate.
   // The first block of intrinsics actually have an unsigned 5 bit field,
   // not a df/n field.
+  case Mips::BI__builtin_msa_cfcmsa:
+  case Mips::BI__builtin_msa_ctcmsa: i = 0; l = 0; u = 31; break;
   case Mips::BI__builtin_msa_clei_u_b:
   case Mips::BI__builtin_msa_clei_u_h:
   case Mips::BI__builtin_msa_clei_u_w:

Modified: cfe/trunk/test/CodeGen/builtins-mips-msa-error.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-mips-msa-error.c?rev=361967&r1=361966&r2=361967&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/builtins-mips-msa-error.c (original)
+++ cfe/trunk/test/CodeGen/builtins-mips-msa-error.c Wed May 29 07:59:32 2019
@@ -77,6 +77,8 @@ void test(void) {
   v4i32_r = __msa_ceqi_w(v4i32_a, 16);               // expected-error {{argument value 16 is outside the valid range [-16, 15]}}
   v2i64_r = __msa_ceqi_d(v2i64_a, 16);               // expected-error {{argument value 16 is outside the valid range [-16, 15]}}
 
+  int_r = __msa_cfcmsa(32);                          // expected-error {{argument value 32 is outside the valid range [0, 31]}}
+
   v16i8_r = __msa_clei_s_b(v16i8_a, 16);             // expected-error {{argument value 16 is outside the valid range [-16, 15]}}
   v8i16_r = __msa_clei_s_h(v8i16_a, 16);             // expected-error {{argument value 16 is outside the valid range [-16, 15]}}
   v4i32_r = __msa_clei_s_w(v4i32_a, 16);             // expected-error {{argument value 16 is outside the valid range [-16, 15]}}
@@ -107,6 +109,8 @@ void test(void) {
   int_r = __msa_copy_u_w(v4u32_a, 4);                // expected-error {{argument value 4 is outside the valid range [0, 3]}}
   ll_r  = __msa_copy_u_d(v2i64_a, 2);                // expected-error {{argument value 2 is outside the valid range [0, 1]}}
 
+  __builtin_msa_ctcmsa(32, 777);                     // expected-error {{argument value 32 is outside the valid range [0, 31]}}
+
   v16i8_r = __msa_insve_b(v16i8_r, 16, v16i8_a);     // expected-error {{argument value 16 is outside the valid range [0, 15]}}
   v8i16_r = __msa_insve_h(v8i16_r, 8, v8i16_a);      // expected-error {{argument value 8 is outside the valid range [0, 7]}}
   v4i32_r = __msa_insve_w(v4i32_r, 4, v4i32_a);      // expected-error {{argument value 4 is outside the valid range [0, 3]}}




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