[PATCH] D50845: [CUDA/OpenMP] Define only some host macros during device compilation

Jonas Hahnfeld via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Thu Aug 30 12:21:48 PDT 2018


Hahnfeld added a comment.

In https://reviews.llvm.org/D50845#1219746, @tra wrote:

> In our case the headers from a relatively old glibc and compiler errors out on this:
>
>   /* This function is used in the `isfinite' macro.  */
>   __MATH_INLINE int
>   __NTH (__finite (double __x))
>   {
>     return (__extension__
>   	  (((((union { double __d; int __i[2]; }) {__d: __x}).__i[1]
>   	     | 0x800fffffu) + 1) >> 31));
>   }
>
>
> expanded to this:
>
>   extern __inline __attribute__ ((__always_inline__)) __attribute__ ((__gnu_inline__)) int
>    __finite (double __x) throw ()
>   {
>     return (__extension__
>      (((((union { double __d; int __i[2]; }) {__d: __x}).__i[1]
>         | 0x800fffffu) + 1) >> 31));
>   }
>
>
> The error:
>
>   .../include/bits/mathinline.h:945:9: error: '(anonymous union at .../include/bits/mathinline.h:945:9)' cannot be defined in a type specifier
>             (((((union { double __d; int __i[2]; }) {__d: __x}).__i[1]
>                  ^
>   .../include/bits/mathinline.h:945:55: error: member reference base type 'void' is not a structure or union
>             (((((union { double __d; int __i[2]; }) {__d: __x}).__i[1]
>                ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~
>
>
> Also, whatever macros we generate do not prevent headers from using x86 inline assembly. I see quite a few inline asm code in preprocessed output. The headers are from libc ~2.19.


Ok, the top preprocessor condition for that function is `#ifndef __SSE2_MATH__` - the exact same macro that was part of the motivation. Can you please test compiling a simple C file (including `math.h`) with `-mno-sse`? My guess would be that this is broken as well.
If yes I'm fine with reverting because I need to teach Clang to allow anonymous unions in type specifiers to make that weird system header work with this patch.


Repository:
  rL LLVM

https://reviews.llvm.org/D50845





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