[PATCH] D48132: [COFF] Add ARM64 intrinsics: __yield, __wfe, __wfi, __sev, __sevl

[Mandeep Singh Grang via Phabricator via cfe-commits]

mgrang created this revision.
mgrang added reviewers: mstorsjo, compnerd.
Herald added a reviewer: javed.absar.
Herald added subscribers: chrib, kristof.beyls.

These intrinsics result in hint instructions. They are provided here for MSVC ARM64 compatibility.


Repository:
  rC Clang

https://reviews.llvm.org/D48132

Files:
  include/clang/Basic/BuiltinsAArch64.def
  lib/CodeGen/CGBuiltin.cpp
  test/CodeGen/arm64-microsoft-intrinsics.c


Index: test/CodeGen/arm64-microsoft-intrinsics.c
===================================================================
--- test/CodeGen/arm64-microsoft-intrinsics.c
+++ test/CodeGen/arm64-microsoft-intrinsics.c
@@ -24,3 +24,38 @@
 
 // CHECK-MSVC: @llvm.aarch64.isb(i32 0)
 // CHECK-LINUX: error: implicit declaration of function '__isb'
+
+void check__yield(void) {
+  __yield();
+}
+
+// CHECK-MSVC: @llvm.aarch64.hint(i32 1)
+// CHECK-LINUX: error: implicit declaration of function '__yield'
+
+void check__wfe(void) {
+  __wfe();
+}
+
+// CHECK-MSVC: @llvm.aarch64.hint(i32 2)
+// CHECK-LINUX: error: implicit declaration of function '__wfe'
+
+void check__wfi(void) {
+  __wfi();
+}
+
+// CHECK-MSVC: @llvm.aarch64.hint(i32 3)
+// CHECK-LINUX: error: implicit declaration of function '__wfi'
+
+void check__sev(void) {
+  __sev();
+}
+
+// CHECK-MSVC: @llvm.aarch64.hint(i32 4)
+// CHECK-LINUX: error: implicit declaration of function '__sev'
+
+void check__sevl(void) {
+  __sevl();
+}
+
+// CHECK-MSVC: @llvm.aarch64.hint(i32 5)
+// CHECK-LINUX: error: implicit declaration of function '__sevl'
Index: lib/CodeGen/CGBuiltin.cpp
===================================================================
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -6362,18 +6362,23 @@
     HintID = 0;
     break;
   case AArch64::BI__builtin_arm_yield:
+  case AArch64::BI__yield:
     HintID = 1;
     break;
   case AArch64::BI__builtin_arm_wfe:
+  case AArch64::BI__wfe:
     HintID = 2;
     break;
   case AArch64::BI__builtin_arm_wfi:
+  case AArch64::BI__wfi:
     HintID = 3;
     break;
   case AArch64::BI__builtin_arm_sev:
+  case AArch64::BI__sev:
     HintID = 4;
     break;
   case AArch64::BI__builtin_arm_sevl:
+  case AArch64::BI__sevl:
     HintID = 5;
     break;
   }
Index: include/clang/Basic/BuiltinsAArch64.def
===================================================================
--- include/clang/Basic/BuiltinsAArch64.def
+++ include/clang/Basic/BuiltinsAArch64.def
@@ -65,9 +65,15 @@
 BUILTIN(__builtin_arm_wsr64, "vcC*LUi", "nc")
 BUILTIN(__builtin_arm_wsrp, "vcC*vC*", "nc")
 
+// MSVC
 LANGBUILTIN(__dmb, "vUi", "nc", ALL_MS_LANGUAGES)
 LANGBUILTIN(__dsb, "vUi", "nc", ALL_MS_LANGUAGES)
 LANGBUILTIN(__isb, "vUi", "nc", ALL_MS_LANGUAGES)
+LANGBUILTIN(__yield, "v", "",   ALL_MS_LANGUAGES)
+LANGBUILTIN(__wfe,   "v", "",   ALL_MS_LANGUAGES)
+LANGBUILTIN(__wfi,   "v", "",   ALL_MS_LANGUAGES)
+LANGBUILTIN(__sev,   "v", "",   ALL_MS_LANGUAGES)
+LANGBUILTIN(__sevl,  "v", "",   ALL_MS_LANGUAGES)
 
 // MSVC intrinsics for volatile but non-acquire/release loads and stores
 LANGBUILTIN(__iso_volatile_load8,   "ccCD*",     "n", ALL_MS_LANGUAGES)


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