r333033 - [X86] As mentioned in post-commit feedback in D47174, move the 128 bit f16c intrinsics into f16cintrin.h and remove __emmintrin_f16c.h
Craig Topper via cfe-commits
cfe-commits at lists.llvm.org
Tue May 22 15:19:19 PDT 2018
Author: ctopper
Date: Tue May 22 15:19:19 2018
New Revision: 333033
URL: http://llvm.org/viewvc/llvm-project?rev=333033&view=rev
Log:
[X86] As mentioned in post-commit feedback in D47174, move the 128 bit f16c intrinsics into f16cintrin.h and remove __emmintrin_f16c.h
These were included in emmintrin.h to match Intel Intrinsics Guide documentation. But this is because icc is capable of emulating them on targets that don't support F16C using library calls. Clang/LLVM doesn't have this emulation support. So it makes more sense to include them in immintrin.h instead.
I've left a comment behind to hopefully deter someone from trying to move them again in the future.
Removed:
cfe/trunk/lib/Headers/__emmintrin_f16c.h
Modified:
cfe/trunk/lib/Headers/CMakeLists.txt
cfe/trunk/lib/Headers/emmintrin.h
cfe/trunk/lib/Headers/f16cintrin.h
cfe/trunk/lib/Headers/module.modulemap
Modified: cfe/trunk/lib/Headers/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/CMakeLists.txt?rev=333033&r1=333032&r2=333033&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/CMakeLists.txt (original)
+++ cfe/trunk/lib/Headers/CMakeLists.txt Tue May 22 15:19:19 2018
@@ -46,7 +46,6 @@ set(files
clflushoptintrin.h
clwbintrin.h
emmintrin.h
- __emmintrin_f16c.h
f16cintrin.h
float.h
fma4intrin.h
Removed: cfe/trunk/lib/Headers/__emmintrin_f16c.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/__emmintrin_f16c.h?rev=333032&view=auto
==============================================================================
--- cfe/trunk/lib/Headers/__emmintrin_f16c.h (original)
+++ cfe/trunk/lib/Headers/__emmintrin_f16c.h (removed)
@@ -1,124 +0,0 @@
-/*===---- __emmintrin_f16c.h - F16C intrinsics -----------------------------===
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- *===-----------------------------------------------------------------------===
- */
-
-#if !defined __EMMINTRIN_H
-#error "Never use <__emmintrin_f16c.h> directly; include <emmintrin.h> instead."
-#endif
-
-#ifndef __EMMINTRIN_F16C_H
-#define __EMMINTRIN_F16C_H
-
-/* Define the default attributes for the functions in this file. */
-#define __DEFAULT_FN_ATTRS \
- __attribute__((__always_inline__, __nodebug__, __target__("f16c")))
-
-/// Converts a 16-bit half-precision float value into a 32-bit float
-/// value.
-///
-/// \headerfile <x86intrin.h>
-///
-/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
-///
-/// \param __a
-/// A 16-bit half-precision float value.
-/// \returns The converted 32-bit float value.
-static __inline float __DEFAULT_FN_ATTRS
-_cvtsh_ss(unsigned short __a)
-{
- __v8hi v = {(short)__a, 0, 0, 0, 0, 0, 0, 0};
- __v4sf r = __builtin_ia32_vcvtph2ps(v);
- return r[0];
-}
-
-/// Converts a 32-bit single-precision float value to a 16-bit
-/// half-precision float value.
-///
-/// \headerfile <x86intrin.h>
-///
-/// \code
-/// unsigned short _cvtss_sh(float a, const int imm);
-/// \endcode
-///
-/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
-///
-/// \param a
-/// A 32-bit single-precision float value to be converted to a 16-bit
-/// half-precision float value.
-/// \param imm
-/// An immediate value controlling rounding using bits [2:0]: \n
-/// 000: Nearest \n
-/// 001: Down \n
-/// 010: Up \n
-/// 011: Truncate \n
-/// 1XX: Use MXCSR.RC for rounding
-/// \returns The converted 16-bit half-precision float value.
-#define _cvtss_sh(a, imm) __extension__ ({ \
- (unsigned short)(((__v8hi)__builtin_ia32_vcvtps2ph((__v4sf){a, 0, 0, 0}, \
- (imm)))[0]); })
-
-/// Converts a 128-bit vector containing 32-bit float values into a
-/// 128-bit vector containing 16-bit half-precision float values.
-///
-/// \headerfile <x86intrin.h>
-///
-/// \code
-/// __m128i _mm_cvtps_ph(__m128 a, const int imm);
-/// \endcode
-///
-/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
-///
-/// \param a
-/// A 128-bit vector containing 32-bit float values.
-/// \param imm
-/// An immediate value controlling rounding using bits [2:0]: \n
-/// 000: Nearest \n
-/// 001: Down \n
-/// 010: Up \n
-/// 011: Truncate \n
-/// 1XX: Use MXCSR.RC for rounding
-/// \returns A 128-bit vector containing converted 16-bit half-precision float
-/// values. The lower 64 bits are used to store the converted 16-bit
-/// half-precision floating-point values.
-#define _mm_cvtps_ph(a, imm) __extension__ ({ \
- (__m128i)__builtin_ia32_vcvtps2ph((__v4sf)(__m128)(a), (imm)); })
-
-/// Converts a 128-bit vector containing 16-bit half-precision float
-/// values into a 128-bit vector containing 32-bit float values.
-///
-/// \headerfile <x86intrin.h>
-///
-/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
-///
-/// \param __a
-/// A 128-bit vector containing 16-bit half-precision float values. The lower
-/// 64 bits are used in the conversion.
-/// \returns A 128-bit vector of [4 x float] containing converted float values.
-static __inline __m128 __DEFAULT_FN_ATTRS
-_mm_cvtph_ps(__m128i __a)
-{
- return (__m128)__builtin_ia32_vcvtph2ps((__v8hi)__a);
-}
-
-#undef __DEFAULT_FN_ATTRS
-
-#endif /* __EMMINTRIN_F16C_H */
Modified: cfe/trunk/lib/Headers/emmintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/emmintrin.h?rev=333033&r1=333032&r2=333033&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/emmintrin.h (original)
+++ cfe/trunk/lib/Headers/emmintrin.h Tue May 22 15:19:19 2018
@@ -44,8 +44,6 @@ typedef unsigned char __v16qu __attribut
* appear in the interface though. */
typedef signed char __v16qs __attribute__((__vector_size__(16)));
-#include <__emmintrin_f16c.h>
-
/* Define the default attributes for the functions in this file. */
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse2")))
Modified: cfe/trunk/lib/Headers/f16cintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/f16cintrin.h?rev=333033&r1=333032&r2=333033&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/f16cintrin.h (original)
+++ cfe/trunk/lib/Headers/f16cintrin.h Tue May 22 15:19:19 2018
@@ -32,9 +32,96 @@
#define __DEFAULT_FN_ATTRS \
__attribute__((__always_inline__, __nodebug__, __target__("f16c")))
-/* The 256-bit versions of functions in f16cintrin.h.
- Intel documents these as being in immintrin.h, and
- they depend on typedefs from avxintrin.h. */
+// NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h,
+// but that's because icc can emulate these without f16c using a library call.
+// Since we don't do that let's leave these in f16cintrin.h.
+
+/// Converts a 16-bit half-precision float value into a 32-bit float
+/// value.
+///
+/// \headerfile <x86intrin.h>
+///
+/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
+///
+/// \param __a
+/// A 16-bit half-precision float value.
+/// \returns The converted 32-bit float value.
+static __inline float __DEFAULT_FN_ATTRS
+_cvtsh_ss(unsigned short __a)
+{
+ __v8hi v = {(short)__a, 0, 0, 0, 0, 0, 0, 0};
+ __v4sf r = __builtin_ia32_vcvtph2ps(v);
+ return r[0];
+}
+
+/// Converts a 32-bit single-precision float value to a 16-bit
+/// half-precision float value.
+///
+/// \headerfile <x86intrin.h>
+///
+/// \code
+/// unsigned short _cvtss_sh(float a, const int imm);
+/// \endcode
+///
+/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
+///
+/// \param a
+/// A 32-bit single-precision float value to be converted to a 16-bit
+/// half-precision float value.
+/// \param imm
+/// An immediate value controlling rounding using bits [2:0]: \n
+/// 000: Nearest \n
+/// 001: Down \n
+/// 010: Up \n
+/// 011: Truncate \n
+/// 1XX: Use MXCSR.RC for rounding
+/// \returns The converted 16-bit half-precision float value.
+#define _cvtss_sh(a, imm) __extension__ ({ \
+ (unsigned short)(((__v8hi)__builtin_ia32_vcvtps2ph((__v4sf){a, 0, 0, 0}, \
+ (imm)))[0]); })
+
+/// Converts a 128-bit vector containing 32-bit float values into a
+/// 128-bit vector containing 16-bit half-precision float values.
+///
+/// \headerfile <x86intrin.h>
+///
+/// \code
+/// __m128i _mm_cvtps_ph(__m128 a, const int imm);
+/// \endcode
+///
+/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
+///
+/// \param a
+/// A 128-bit vector containing 32-bit float values.
+/// \param imm
+/// An immediate value controlling rounding using bits [2:0]: \n
+/// 000: Nearest \n
+/// 001: Down \n
+/// 010: Up \n
+/// 011: Truncate \n
+/// 1XX: Use MXCSR.RC for rounding
+/// \returns A 128-bit vector containing converted 16-bit half-precision float
+/// values. The lower 64 bits are used to store the converted 16-bit
+/// half-precision floating-point values.
+#define _mm_cvtps_ph(a, imm) __extension__ ({ \
+ (__m128i)__builtin_ia32_vcvtps2ph((__v4sf)(__m128)(a), (imm)); })
+
+/// Converts a 128-bit vector containing 16-bit half-precision float
+/// values into a 128-bit vector containing 32-bit float values.
+///
+/// \headerfile <x86intrin.h>
+///
+/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
+///
+/// \param __a
+/// A 128-bit vector containing 16-bit half-precision float values. The lower
+/// 64 bits are used in the conversion.
+/// \returns A 128-bit vector of [4 x float] containing converted float values.
+static __inline __m128 __DEFAULT_FN_ATTRS
+_mm_cvtph_ps(__m128i __a)
+{
+ return (__m128)__builtin_ia32_vcvtph2ps((__v8hi)__a);
+}
/// Converts a 256-bit vector of [8 x float] into a 128-bit vector
/// containing 16-bit half-precision float values.
Modified: cfe/trunk/lib/Headers/module.modulemap
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/module.modulemap?rev=333033&r1=333032&r2=333033&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/module.modulemap (original)
+++ cfe/trunk/lib/Headers/module.modulemap Tue May 22 15:19:19 2018
@@ -95,14 +95,9 @@ module _Builtin_intrinsics [system] [ext
explicit module sse2 {
export sse
- export f16c_128
header "emmintrin.h"
}
- explicit module f16c_128 {
- header "__emmintrin_f16c.h"
- }
-
explicit module sse3 {
export sse2
header "pmmintrin.h"
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