[PATCH] D41523: xmmintrin.h documentation fixes and updates

Craig Topper via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Thu Jan 4 19:32:55 PST 2018

craig.topper added inline comments.

Comment at: lib/Headers/xmmintrin.h:2199
-/// This intrinsic corresponds to the <c> VPINSRW / PINSRW </c> instruction.
+/// This intrinsic corresponds to the <c> PINSRW </c> instruction.
kromanova wrote:
> craig.topper wrote:
> > Why is VPINSRW removed?
> I suspect the rational is the same I talked about in mmintrin.h review. 
> This intrinsic should use MMX registers and shouldn't have corresponding AVX instruction(s).
> I've tried this and with or without -mavx for Linux/x86_64 we generate PINSRW in both cases (i.e. I wasn't able to trigger generation of VEX prefixed instruction).
> __m64 foo (__m64 a, int b)
> {
>   __m64 x;
>   x = _mm_insert_pi16 (a, b, 0);
>   return x;
> }
I didn't realize this was a MMX type intrinsic in the xmmintrin file. So VPINSRW being removed makes sense. Sorry for the noise.


More information about the cfe-commits mailing list