[PATCH] D37568: [AMDGPU] Allow flexible register names in inline asm constraints

[Matt Arsenault via Phabricator via cfe-commits]

arsenm added inline comments.


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Comment at: lib/Basic/Targets/AMDGPU.h:124
+  /// {sn}, {s[n]}
+  /// {S} , wheere S is a special register name
+  ////{v[n:m]}
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Typo wheere


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Comment at: lib/Basic/Targets/AMDGPU.h:194
+    Info.setAllowsRegister();
+    Name = S.data() - 1;
+    return true;
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I'm not sure I understand these data() - 1s. 


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Comment at: test/Sema/inline-asm-validate-amdgpu.cl:74
+    __asm("v_add_f64_e64 v[1:2], v[3:4], v[5:6]" : "=v[1:2]"(ci) : "v[3:4]"(ai), "v[5:6]"(bi) : ); //expected-error {{invalid output constraint '=v[1:2]' in asm}}
+
+    c[i] = ci;
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While you're here can we add some tests for the immediate constraints? There was a bug report recently when using s_trap with the i constraints for the constant operand.


https://reviews.llvm.org/D37568