[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

[Strahinja Petrovic via Phabricator via cfe-commits]

spetrovic created this revision.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.

This patch enables option for reading thread pointer directly from coprocessor register (-mread-tp-hard). This option is supported in llc also ( https://reviews.llvm.org/D34408 ).


https://reviews.llvm.org/D34878

Files:
  include/clang/Driver/Options.td
  lib/Basic/Targets.cpp
  lib/Driver/ToolChains/Arch/ARM.cpp
  test/Driver/arm-features.c


Index: test/Driver/arm-features.c
===================================================================
--- test/Driver/arm-features.c
+++ test/Driver/arm-features.c
@@ -7,6 +7,8 @@
 // RUN: %clang -target arm-none-none-eabi -mcpu=generic+dsp -march=armv8m.main -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-DSP %s
 // RUN: %clang -target arm-none-none-eabi -mcpu=generic -march=armv8m.main+dsp -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-DSP %s
 // CHECK-DSP: "-cc1"{{.*}} "-triple" "thumbv8m.main-{{.*}} "-target-cpu" "generic"{{.*}} "-target-feature" "+dsp"
+// RUN: %clang -target arm-none-none-eabi -mread-tp-hard -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-READTP %s
+// CHECK-READTP: "-target-feature" "+read-tp-hard"
 
 // RUN: %clang -target arm-none-none-eabi -mcpu=generic+nocrc -march=armv8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-NOCRC %s
 // RUN: %clang -target arm-none-none-eabi -mcpu=generic -march=armv8a+nocrc -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-NOCRC %s
Index: lib/Driver/ToolChains/Arch/ARM.cpp
===================================================================
--- lib/Driver/ToolChains/Arch/ARM.cpp
+++ lib/Driver/ToolChains/Arch/ARM.cpp
@@ -283,6 +283,10 @@
     }
   }
 
+  // Setting the way of reading thread pointer.
+  if (Args.getLastArg(options::OPT_mread_tp_hard))
+    Features.push_back("+read-tp-hard");
+
   // Check -march. ClangAs gives preference to -Wa,-march=.
   const Arg *ArchArg = Args.getLastArg(options::OPT_march_EQ);
   StringRef ArchName;
Index: lib/Basic/Targets.cpp
===================================================================
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -5094,6 +5094,7 @@
   unsigned Crypto : 1;
   unsigned DSP : 1;
   unsigned Unaligned : 1;
+  unsigned ReadTpHard : 1;
 
   enum {
     LDREX_B = (1 << 0), /// byte (8-bit)
@@ -5486,6 +5487,7 @@
     Unaligned = 1;
     SoftFloat = SoftFloatABI = false;
     HWDiv = 0;
+    ReadTpHard = false;
 
     // This does not diagnose illegal cases like having both
     // "+vfpv2" and "+vfpv3" or having "+neon" and "+fp-only-sp".
@@ -5526,7 +5528,8 @@
         Unaligned = 0;
       } else if (Feature == "+fp16") {
         HW_FP |= HW_FP_HP;
-      }
+      } else if (Feature == "+read-tp-hard")
+        ReadTpHard = true;
     }
     HW_FP &= ~HW_FP_remove;
 
Index: include/clang/Driver/Options.td
===================================================================
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -1651,6 +1651,8 @@
   HelpText<"Disallow generation of data access to code sections (ARM only)">;
 def mno_execute_only : Flag<["-"], "mno-execute-only">, Group<m_arm_Features_Group>,
   HelpText<"Allow generation of data access to code sections (ARM only)">;
+def mread_tp_hard : Flag<["-"], "mread-tp-hard">, Group<m_arm_Features_Group>,
+  HelpText<"Read thread pointer from coprocessor register (ARM only)">;
 def mpure_code : Flag<["-"], "mpure-code">, Alias<mexecute_only>; // Alias for GCC compatibility
 def mno_pure_code : Flag<["-"], "mno-pure-code">, Alias<mno_execute_only>;
 def mtvos_version_min_EQ : Joined<["-"], "mtvos-version-min=">, Group<m_Group>;


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