[PATCH] D30739: [OpenMP] "declare simd" for AArch64 Advanced SIMD.

[Francesco Petrogalli via Phabricator via cfe-commits]

fpetrogalli added inline comments.


================
Comment at: lib/CodeGen/CGOpenMPRuntime.cpp:6821
+      ISADataTy ISAData[] = {
+          {'n', 64},  // double-word Advanced SIMD
+          {'n', 128}, // quad-word Advanced SIMD
----------------
rengolin wrote:
> No f32?
Sorry, I am not sure to understand what you mean here by f32.

I am considering the double-word registers (64 bits wide) and quad-word registers (128 bits wide) that are used in AdvSIMD (NEON) for AArch64 [1].

[1] https://developer.arm.com/docs/dui0473/latest/neon-programming/neon-views-of-the-extension-register-bank


https://reviews.llvm.org/D30739