r285436 - Implement vector count leading/trailing bytes with zero lsb and vector parity
Nemanja Ivanovic via cfe-commits
cfe-commits at lists.llvm.org
Fri Oct 28 12:49:03 PDT 2016
Author: nemanjai
Date: Fri Oct 28 14:49:03 2016
New Revision: 285436
URL: http://llvm.org/viewvc/llvm-project?rev=285436&view=rev
Log:
Implement vector count leading/trailing bytes with zero lsb and vector parity
builtins - clang portion
This patch corresponds to review: https://reviews.llvm.org/D26002
Committing on behalf of Zaara Syeda.
Modified:
cfe/trunk/include/clang/Basic/BuiltinsPPC.def
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c
Modified: cfe/trunk/include/clang/Basic/BuiltinsPPC.def
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsPPC.def?rev=285436&r1=285435&r2=285436&view=diff
==============================================================================
--- cfe/trunk/include/clang/Basic/BuiltinsPPC.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsPPC.def Fri Oct 28 14:49:03 2016
@@ -272,6 +272,12 @@ BUILTIN(__builtin_altivec_vctzh, "V8UsV8
BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "")
BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "")
+BUILTIN(__builtin_altivec_vclzlsbb, "SiV16Uc", "")
+BUILTIN(__builtin_altivec_vctzlsbb, "SiV16Uc", "")
+BUILTIN(__builtin_altivec_vprtybw, "V4UiV4Ui", "")
+BUILTIN(__builtin_altivec_vprtybd, "V2ULLiV2ULLi", "")
+BUILTIN(__builtin_altivec_vprtybq, "V1ULLLiV1ULLLi", "")
+
// Vector population count built-ins
BUILTIN(__builtin_altivec_vpopcntb, "V16UcV16Uc", "")
BUILTIN(__builtin_altivec_vpopcnth, "V8UsV8Us", "")
Modified: cfe/trunk/lib/Headers/altivec.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=285436&r1=285435&r2=285436&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Fri Oct 28 14:49:03 2016
@@ -1720,6 +1720,72 @@ vec_cmpnez(vector unsigned int __a, vect
(vector int)__b);
}
+static __inline__ signed int __ATTRS_o_ai
+vec_cntlz_lsbb(vector signed char __a) {
+#ifdef __LITTLE_ENDIAN__
+ return __builtin_altivec_vctzlsbb(__a);
+#else
+ return __builtin_altivec_vclzlsbb(__a);
+#endif
+}
+
+static __inline__ signed int __ATTRS_o_ai
+vec_cntlz_lsbb(vector unsigned char __a) {
+#ifdef __LITTLE_ENDIAN__
+ return __builtin_altivec_vctzlsbb(__a);
+#else
+ return __builtin_altivec_vclzlsbb(__a);
+#endif
+}
+
+static __inline__ signed int __ATTRS_o_ai
+vec_cnttz_lsbb(vector signed char __a) {
+#ifdef __LITTLE_ENDIAN__
+ return __builtin_altivec_vclzlsbb(__a);
+#else
+ return __builtin_altivec_vctzlsbb(__a);
+#endif
+}
+
+static __inline__ signed int __ATTRS_o_ai
+vec_cnttz_lsbb(vector unsigned char __a) {
+#ifdef __LITTLE_ENDIAN__
+ return __builtin_altivec_vclzlsbb(__a);
+#else
+ return __builtin_altivec_vctzlsbb(__a);
+#endif
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_parity_lsbb(vector unsigned int __a) {
+ return __builtin_altivec_vprtybw(__a);
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_parity_lsbb(vector signed int __a) {
+ return __builtin_altivec_vprtybw(__a);
+}
+
+static __inline__ vector unsigned __int128 __ATTRS_o_ai
+vec_parity_lsbb(vector unsigned __int128 __a) {
+ return __builtin_altivec_vprtybq(__a);
+}
+
+static __inline__ vector unsigned __int128 __ATTRS_o_ai
+vec_parity_lsbb(vector signed __int128 __a) {
+ return __builtin_altivec_vprtybq(__a);
+}
+
+static __inline__ vector unsigned long long __ATTRS_o_ai
+vec_parity_lsbb(vector unsigned long long __a) {
+ return __builtin_altivec_vprtybd(__a);
+}
+
+static __inline__ vector unsigned long long __ATTRS_o_ai
+vec_parity_lsbb(vector signed long long __a) {
+ return __builtin_altivec_vprtybd(__a);
+}
+
#endif
/* vec_cmpgt */
Modified: cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c?rev=285436&r1=285435&r2=285436&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c (original)
+++ cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c Fri Oct 28 14:49:03 2016
@@ -23,6 +23,8 @@ vector unsigned long long vula, vulb;
vector bool long long vbla, vblb;
vector float vfa, vfb;
vector double vda, vdb;
+vector unsigned __int128 vui128a, vui128b;
+vector signed __int128 vsi128a, vsi128b;
unsigned test1(void) {
// CHECK-BE: @llvm.ppc.altivec.vcmpequb(<16 x i8>
@@ -698,6 +700,81 @@ vector unsigned short test54(void) {
// CHECK-NEXT: ret <8 x i16>
return vec_popcnt (vusa);
}
+signed int test59(void) {
+// CHECK-BE: @llvm.ppc.altivec.vclzlsbb(<16 x i8>
+// CHECK-BE-NEXT: ret i32
+// CHECK-LE: @llvm.ppc.altivec.vctzlsbb(<16 x i8>
+// CHECK-LE-NEXT: ret i32
+ return vec_cntlz_lsbb (vuca);
+}
+signed int test60(void) {
+// CHECK-BE: @llvm.ppc.altivec.vclzlsbb(<16 x i8>
+// CHECK-BE-NEXT: ret i32
+// CHECK-LE: @llvm.ppc.altivec.vctzlsbb(<16 x i8>
+// CHECK-LE-NEXT: ret i32
+ return vec_cntlz_lsbb (vsca);
+}
+signed int test61(void) {
+// CHECK-BE: @llvm.ppc.altivec.vctzlsbb(<16 x i8>
+// CHECK-BE-NEXT: ret i32
+// CHECK-LE: @llvm.ppc.altivec.vclzlsbb(<16 x i8>
+// CHECK-LE-NEXT: ret i32
+ return vec_cnttz_lsbb (vsca);
+}
+signed int test62(void) {
+// CHECK-BE: @llvm.ppc.altivec.vctzlsbb(<16 x i8>
+// CHECK-BE-NEXT: ret i32
+// CHECK-LE: @llvm.ppc.altivec.vclzlsbb(<16 x i8>
+// CHECK-LE-NEXT: ret i32
+ return vec_cnttz_lsbb (vuca);
+}
+
+vector unsigned int test63(void) {
+// CHECK-BE: @llvm.ppc.altivec.vprtybw(<4 x i32>
+// CHECK-BE-NEXT: ret <4 x i32>
+// CHECK: @llvm.ppc.altivec.vprtybw(<4 x i32>
+// CHECK-NEXT: ret <4 x i32>
+ return vec_parity_lsbb (vuia);
+}
+
+vector unsigned int test64(void) {
+// CHECK-BE: @llvm.ppc.altivec.vprtybw(<4 x i32>
+// CHECK-BE-NEXT: ret <4 x i32>
+// CHECK: @llvm.ppc.altivec.vprtybw(<4 x i32>
+// CHECK-NEXT: ret <4 x i32>
+ return vec_parity_lsbb (vsia);
+}
+
+vector unsigned long long test65(void) {
+// CHECK-BE: @llvm.ppc.altivec.vprtybd(<2 x i64>
+// CHECK-BE-NEXT: ret <2 x i64>
+// CHECK: @llvm.ppc.altivec.vprtybd(<2 x i64>
+// CHECK-NEXT: ret <2 x i64>
+ return vec_parity_lsbb (vula);
+}
+
+vector unsigned long long test66(void) {
+// CHECK-BE: @llvm.ppc.altivec.vprtybd(<2 x i64>
+// CHECK-BE-NEXT: ret <2 x i64>
+// CHECK: @llvm.ppc.altivec.vprtybd(<2 x i64>
+// CHECK-NEXT: ret <2 x i64>
+ return vec_parity_lsbb (vsla);
+}
+vector unsigned __int128 test67(void) {
+// CHECK-BE: @llvm.ppc.altivec.vprtybq(<1 x i128>
+// CHECK-BE-NEXT: ret <1 x i128>
+// CHECK: @llvm.ppc.altivec.vprtybq(<1 x i128>
+// CHECK-NEXT: ret <1 x i128>
+ return vec_parity_lsbb (vui128a);
+}
+
+vector unsigned __int128 test68(void) {
+// CHECK-BE: @llvm.ppc.altivec.vprtybq(<1 x i128>
+// CHECK-BE-NEXT: ret <1 x i128>
+// CHECK: @llvm.ppc.altivec.vprtybq(<1 x i128>
+// CHECK-NEXT: ret <1 x i128>
+ return vec_parity_lsbb (vsi128a);
+}
vector double test55(void) {
// CHECK-BE: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
// CHECK-BE-NEXT: ret <2 x double>
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