[PATCH] D19665: [ARM] Guard the declarations of f16 to f32 vcvt intrinsics in arm_neon.h by testing __ARM_FP

[silviu.baranga@arm.com via cfe-commits]

sbaranga created this revision.
sbaranga added a reviewer: rengolin.
sbaranga added subscribers: t.p.northover, cfe-commits.
Herald added subscribers: rengolin, aemerson.

Conversions between float and half are only available when the
taraget has the half-precision extension. Guard these intrinsics
so that they don't cause crashes in the backend.

Fixes PR27550.

http://reviews.llvm.org/D19665

Files:
  include/clang/Basic/arm_neon.td
  test/CodeGen/arm-negative-fp16.c

Index: include/clang/Basic/arm_neon.td
===================================================================
--- include/clang/Basic/arm_neon.td
+++ include/clang/Basic/arm_neon.td
@@ -704,8 +704,12 @@
 ////////////////////////////////////////////////////////////////////////////////
 // E.3.22 Converting vectors
 
-def VCVT_F16_F32 : SInst<"vcvt_f16_f32", "md", "Hf">;
-def VCVT_F32_F16 : SInst<"vcvt_f32_f16", "wd", "h">;
+let ArchGuard = "(__ARM_FP & 2)" in {
+  def VCVT_F16_F32 : SInst<"vcvt_f16_f32", "md", "Hf">;
+  def VCVT_F32_F16 : SInst<"vcvt_f32_f16", "wd", "h">;
+  def VCVT_HIGH_F16_F32 : SOpInst<"vcvt_high_f16", "hmj", "Hf", OP_VCVT_NA_HI_F16>;
+  def VCVT_HIGH_F32_F16 : SOpInst<"vcvt_high_f32", "wk", "h", OP_VCVT_EX_HI_F32>;
+}
 
 def VCVT_S32     : SInst<"vcvt_s32", "xd",  "fQf">;
 def VCVT_U32     : SInst<"vcvt_u32", "ud",  "fQf">;
@@ -981,8 +985,6 @@
 def VCVT_U64 : SInst<"vcvt_u64", "ud",  "dQd">;
 def VCVT_F64 : SInst<"vcvt_f64", "Fd",  "lUlQlQUl">;
 
-def VCVT_HIGH_F16_F32 : SOpInst<"vcvt_high_f16", "hmj", "Hf", OP_VCVT_NA_HI_F16>;
-def VCVT_HIGH_F32_F16 : SOpInst<"vcvt_high_f32", "wk", "h", OP_VCVT_EX_HI_F32>;
 def VCVT_HIGH_F32_F64 : SOpInst<"vcvt_high_f32", "qfj", "d", OP_VCVT_NA_HI_F32>;
 def VCVT_HIGH_F64_F32 : SOpInst<"vcvt_high_f64", "wj", "f", OP_VCVT_EX_HI_F64>;
 
Index: test/CodeGen/arm-negative-fp16.c
===================================================================
--- /dev/null
+++ test/CodeGen/arm-negative-fp16.c
@@ -0,0 +1,18 @@
+// RUN: %clang_cc1 -triple thumbv7-none-eabi %s -target-feature +neon -target-feature -fp16 -fsyntax-only -verify
+
+#include <arm_neon.h>
+
+float16x4_t test_vcvt_f16_f32(float32x4_t a) {
+  return vcvt_f16_f32(a); // expected-warning{{implicit declaration of function 'vcvt_f16_f32'}}  expected-error{{returning 'int' from a function with incompatible result type 'float16x4_t'}}
+}
+
+float32x4_t test_vcvt_f32_f16(float16x4_t a) {
+  return vcvt_f32_f16(a); // expected-warning{{implicit declaration of function 'vcvt_f32_f16'}} expected-error{{returning 'int' from a function with incompatible result type 'float32x4_t'}}
+}
+
+float32x4_t test_vcvt_high_f32_f16(float16x8_t a) {
+  return vcvt_high_f32_f16(a); // expected-warning{{implicit declaration of function 'vcvt_high_f32_f16'}} expected-error{{returning 'int' from a function with incompatible result type 'float32x4_t'}}
+}
+float16x8_t test_vcvt_high_f16_f32(float16x4_t a, float32x4_t b) {
+  return vcvt_high_f16_f32(a, b); // expected-warning{{implicit declaration of function 'vcvt_high_f16_f32'}} expected-error{{returning 'int' from a function with incompatible result type 'float16x8_t'}}
+}


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