r243409 - [X86][AVX512VL] add AVX512VL intrinsics 4 out of 4
Asaf Badouh
asaf.badouh at intel.com
Tue Jul 28 05:04:40 PDT 2015
Author: abadouh
Date: Tue Jul 28 07:04:40 2015
New Revision: 243409
URL: http://llvm.org/viewvc/llvm-project?rev=243409&view=rev
Log:
[X86][AVX512VL] add AVX512VL intrinsics 4 out of 4
Differential Revision: http://reviews.llvm.org/D11526
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/lib/Headers/avx512vlintrin.h
cfe/trunk/test/CodeGen/avx512vl-builtins.c
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=243409&r1=243408&r2=243409&view=diff
==============================================================================
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Tue Jul 28 07:04:40 2015
@@ -1378,5 +1378,37 @@ BUILTIN(__builtin_ia32_scattersiv4sf, "v
BUILTIN(__builtin_ia32_scattersiv4si, "vv*UcV4iV4iIi", "")
BUILTIN(__builtin_ia32_scattersiv8sf, "vv*UcV8iV8fIi", "")
BUILTIN(__builtin_ia32_scattersiv8si, "vv*UcV8iV8iIi", "")
+BUILTIN(__builtin_ia32_sqrtpd128_mask, "V2dV2dV2dUc", "")
+BUILTIN(__builtin_ia32_sqrtpd256_mask, "V4dV4dV4dUc", "")
+BUILTIN(__builtin_ia32_sqrtps128_mask, "V4fV4fV4fUc", "")
+BUILTIN(__builtin_ia32_sqrtps256_mask, "V8fV8fV8fUc", "")
+BUILTIN(__builtin_ia32_subpd128_mask, "V2dV2dV2dV2dUc", "")
+BUILTIN(__builtin_ia32_subpd256_mask, "V4dV4dV4dV4dUc", "")
+BUILTIN(__builtin_ia32_subps128_mask, "V4fV4fV4fV4fUc", "")
+BUILTIN(__builtin_ia32_subps256_mask, "V8fV8fV8fV8fUc", "")
+BUILTIN(__builtin_ia32_vpermi2vard128_mask, "V4iV4iV4iV4iUc", "")
+BUILTIN(__builtin_ia32_vpermi2vard256_mask, "V8iV8iV8iV8iUc", "")
+BUILTIN(__builtin_ia32_vpermi2varpd128_mask, "V2dV2dV2LLiV2dUc", "")
+BUILTIN(__builtin_ia32_vpermi2varpd256_mask, "V4dV4dV4LLiV4dUc", "")
+BUILTIN(__builtin_ia32_vpermi2varps128_mask, "V4fV4fV4iV4fUc", "")
+BUILTIN(__builtin_ia32_vpermi2varps256_mask, "V8fV8fV8iV8fUc", "")
+BUILTIN(__builtin_ia32_vpermi2varq128_mask, "V2LLiV2LLiV2LLiV2LLiUc", "")
+BUILTIN(__builtin_ia32_vpermi2varq256_mask, "V4LLiV4LLiV4LLiV4LLiUc", "")
+BUILTIN(__builtin_ia32_vpermt2vard128_mask, "V4iV4iV4iV4iUc", "")
+BUILTIN(__builtin_ia32_vpermt2vard128_maskz, "V4iV4iV4iV4iUc", "")
+BUILTIN(__builtin_ia32_vpermt2vard256_mask, "V8iV8iV8iV8iUc", "")
+BUILTIN(__builtin_ia32_vpermt2vard256_maskz, "V8iV8iV8iV8iUc", "")
+BUILTIN(__builtin_ia32_vpermt2varpd128_mask, "V2dV2LLiV2dV2dUc", "")
+BUILTIN(__builtin_ia32_vpermt2varpd128_maskz, "V2dV2LLiV2dV2dUc", "")
+BUILTIN(__builtin_ia32_vpermt2varpd256_mask, "V4dV4LLiV4dV4dUc", "")
+BUILTIN(__builtin_ia32_vpermt2varpd256_maskz, "V4dV4LLiV4dV4dUc", "")
+BUILTIN(__builtin_ia32_vpermt2varps128_mask, "V4fV4iV4fV4fUc", "")
+BUILTIN(__builtin_ia32_vpermt2varps128_maskz, "V4fV4iV4fV4fUc", "")
+BUILTIN(__builtin_ia32_vpermt2varps256_mask, "V8fV8iV8fV8fUc", "")
+BUILTIN(__builtin_ia32_vpermt2varps256_maskz, "V8fV8iV8fV8fUc", "")
+BUILTIN(__builtin_ia32_vpermt2varq128_mask, "V2LLiV2LLiV2LLiV2LLiUc", "")
+BUILTIN(__builtin_ia32_vpermt2varq128_maskz, "V2LLiV2LLiV2LLiV2LLiUc", "")
+BUILTIN(__builtin_ia32_vpermt2varq256_mask, "V4LLiV4LLiV4LLiV4LLiUc", "")
+BUILTIN(__builtin_ia32_vpermt2varq256_maskz, "V4LLiV4LLiV4LLiV4LLiUc", "")
#undef BUILTIN
Modified: cfe/trunk/lib/Headers/avx512vlintrin.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512vlintrin.h?rev=243409&r1=243408&r2=243409&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/avx512vlintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512vlintrin.h Tue Jul 28 07:04:40 2015
@@ -4147,6 +4147,462 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __
__builtin_ia32_scattersiv8si (__addr, __mask, (__v8si) __index, \
(__v8si) __v1, __scale); })
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_mask_sqrt_pd (__m128d __W, __mmask8 __U, __m128d __A) {
+ return (__m128d) __builtin_ia32_sqrtpd128_mask ((__v2df) __A,
+ (__v2df) __W,
+ (__mmask8) __U);
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_maskz_sqrt_pd (__mmask8 __U, __m128d __A) {
+ return (__m128d) __builtin_ia32_sqrtpd128_mask ((__v2df) __A,
+ (__v2df)
+ _mm_setzero_pd (),
+ (__mmask8) __U);
+}
+
+static __inline__ __m256d __DEFAULT_FN_ATTRS
+_mm256_mask_sqrt_pd (__m256d __W, __mmask8 __U, __m256d __A) {
+ return (__m256d) __builtin_ia32_sqrtpd256_mask ((__v4df) __A,
+ (__v4df) __W,
+ (__mmask8) __U);
+}
+
+static __inline__ __m256d __DEFAULT_FN_ATTRS
+_mm256_maskz_sqrt_pd (__mmask8 __U, __m256d __A) {
+ return (__m256d) __builtin_ia32_sqrtpd256_mask ((__v4df) __A,
+ (__v4df)
+ _mm256_setzero_pd (),
+ (__mmask8) __U);
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_mask_sqrt_ps (__m128 __W, __mmask8 __U, __m128 __A) {
+ return (__m128) __builtin_ia32_sqrtps128_mask ((__v4sf) __A,
+ (__v4sf) __W,
+ (__mmask8) __U);
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_maskz_sqrt_ps (__mmask8 __U, __m128 __A) {
+ return (__m128) __builtin_ia32_sqrtps128_mask ((__v4sf) __A,
+ (__v4sf)
+ _mm_setzero_ps (),
+ (__mmask8) __U);
+}
+
+static __inline__ __m256 __DEFAULT_FN_ATTRS
+_mm256_mask_sqrt_ps (__m256 __W, __mmask8 __U, __m256 __A) {
+ return (__m256) __builtin_ia32_sqrtps256_mask ((__v8sf) __A,
+ (__v8sf) __W,
+ (__mmask8) __U);
+}
+
+static __inline__ __m256 __DEFAULT_FN_ATTRS
+_mm256_maskz_sqrt_ps (__mmask8 __U, __m256 __A) {
+ return (__m256) __builtin_ia32_sqrtps256_mask ((__v8sf) __A,
+ (__v8sf)
+ _mm256_setzero_ps (),
+ (__mmask8) __U);
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_mask_sub_pd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
+ return (__m128d) __builtin_ia32_subpd128_mask ((__v2df) __A,
+ (__v2df) __B,
+ (__v2df) __W,
+ (__mmask8) __U);
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_maskz_sub_pd (__mmask8 __U, __m128d __A, __m128d __B) {
+ return (__m128d) __builtin_ia32_subpd128_mask ((__v2df) __A,
+ (__v2df) __B,
+ (__v2df)
+ _mm_setzero_pd (),
+ (__mmask8) __U);
+}
+
+static __inline__ __m256d __DEFAULT_FN_ATTRS
+_mm256_mask_sub_pd (__m256d __W, __mmask8 __U, __m256d __A,
+ __m256d __B) {
+ return (__m256d) __builtin_ia32_subpd256_mask ((__v4df) __A,
+ (__v4df) __B,
+ (__v4df) __W,
+ (__mmask8) __U);
+}
+
+static __inline__ __m256d __DEFAULT_FN_ATTRS
+_mm256_maskz_sub_pd (__mmask8 __U, __m256d __A, __m256d __B) {
+ return (__m256d) __builtin_ia32_subpd256_mask ((__v4df) __A,
+ (__v4df) __B,
+ (__v4df)
+ _mm256_setzero_pd (),
+ (__mmask8) __U);
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_mask_sub_ps (__m128 __W, __mmask16 __U, __m128 __A, __m128 __B) {
+ return (__m128) __builtin_ia32_subps128_mask ((__v4sf) __A,
+ (__v4sf) __B,
+ (__v4sf) __W,
+ (__mmask8) __U);
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_maskz_sub_ps (__mmask16 __U, __m128 __A, __m128 __B) {
+ return (__m128) __builtin_ia32_subps128_mask ((__v4sf) __A,
+ (__v4sf) __B,
+ (__v4sf)
+ _mm_setzero_ps (),
+ (__mmask8) __U);
+}
+
+static __inline__ __m256 __DEFAULT_FN_ATTRS
+_mm256_mask_sub_ps (__m256 __W, __mmask16 __U, __m256 __A, __m256 __B) {
+ return (__m256) __builtin_ia32_subps256_mask ((__v8sf) __A,
+ (__v8sf) __B,
+ (__v8sf) __W,
+ (__mmask8) __U);
+}
+
+static __inline__ __m256 __DEFAULT_FN_ATTRS
+_mm256_maskz_sub_ps (__mmask16 __U, __m256 __A, __m256 __B) {
+ return (__m256) __builtin_ia32_subps256_mask ((__v8sf) __A,
+ (__v8sf) __B,
+ (__v8sf)
+ _mm256_setzero_ps (),
+ (__mmask8) __U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_mask2_permutex2var_epi32 (__m128i __A, __m128i __I, __mmask8 __U,
+ __m128i __B) {
+ return (__m128i) __builtin_ia32_vpermi2vard128_mask ((__v4si) __A,
+ (__v4si) __I
+ /* idx */ ,
+ (__v4si) __B,
+ (__mmask8) __U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_mask2_permutex2var_epi32 (__m256i __A, __m256i __I,
+ __mmask8 __U, __m256i __B) {
+ return (__m256i) __builtin_ia32_vpermi2vard256_mask ((__v8si) __A,
+ (__v8si) __I
+ /* idx */ ,
+ (__v8si) __B,
+ (__mmask8) __U);
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_mask2_permutex2var_pd (__m128d __A, __m128i __I, __mmask8 __U,
+ __m128d __B) {
+ return (__m128d) __builtin_ia32_vpermi2varpd128_mask ((__v2df) __A,
+ (__v2di) __I
+ /* idx */ ,
+ (__v2df) __B,
+ (__mmask8)
+ __U);
+}
+
+static __inline__ __m256d __DEFAULT_FN_ATTRS
+_mm256_mask2_permutex2var_pd (__m256d __A, __m256i __I, __mmask8 __U,
+ __m256d __B) {
+ return (__m256d) __builtin_ia32_vpermi2varpd256_mask ((__v4df) __A,
+ (__v4di) __I
+ /* idx */ ,
+ (__v4df) __B,
+ (__mmask8)
+ __U);
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_mask2_permutex2var_ps (__m128 __A, __m128i __I, __mmask8 __U,
+ __m128 __B) {
+ return (__m128) __builtin_ia32_vpermi2varps128_mask ((__v4sf) __A,
+ (__v4si) __I
+ /* idx */ ,
+ (__v4sf) __B,
+ (__mmask8) __U);
+}
+
+static __inline__ __m256 __DEFAULT_FN_ATTRS
+_mm256_mask2_permutex2var_ps (__m256 __A, __m256i __I, __mmask8 __U,
+ __m256 __B) {
+ return (__m256) __builtin_ia32_vpermi2varps256_mask ((__v8sf) __A,
+ (__v8si) __I
+ /* idx */ ,
+ (__v8sf) __B,
+ (__mmask8) __U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_mask2_permutex2var_epi64 (__m128i __A, __m128i __I, __mmask8 __U,
+ __m128i __B) {
+ return (__m128i) __builtin_ia32_vpermi2varq128_mask ((__v2di) __A,
+ (__v2di) __I
+ /* idx */ ,
+ (__v2di) __B,
+ (__mmask8) __U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_mask2_permutex2var_epi64 (__m256i __A, __m256i __I,
+ __mmask8 __U, __m256i __B) {
+ return (__m256i) __builtin_ia32_vpermi2varq256_mask ((__v4di) __A,
+ (__v4di) __I
+ /* idx */ ,
+ (__v4di) __B,
+ (__mmask8) __U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_permutex2var_epi32 (__m128i __A, __m128i __I, __m128i __B) {
+ return (__m128i) __builtin_ia32_vpermt2vard128_mask ((__v4si) __I
+ /* idx */ ,
+ (__v4si) __A,
+ (__v4si) __B,
+ (__mmask8) -1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_mask_permutex2var_epi32 (__m128i __A, __mmask8 __U, __m128i __I,
+ __m128i __B) {
+ return (__m128i) __builtin_ia32_vpermt2vard128_mask ((__v4si) __I
+ /* idx */ ,
+ (__v4si) __A,
+ (__v4si) __B,
+ (__mmask8) __U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_maskz_permutex2var_epi32 (__mmask8 __U, __m128i __A, __m128i __I,
+ __m128i __B) {
+ return (__m128i) __builtin_ia32_vpermt2vard128_maskz ((__v4si) __I
+ /* idx */ ,
+ (__v4si) __A,
+ (__v4si) __B,
+ (__mmask8)
+ __U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_permutex2var_epi32 (__m256i __A, __m256i __I, __m256i __B) {
+ return (__m256i) __builtin_ia32_vpermt2vard256_mask ((__v8si) __I
+ /* idx */ ,
+ (__v8si) __A,
+ (__v8si) __B,
+ (__mmask8) -1);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_mask_permutex2var_epi32 (__m256i __A, __mmask8 __U, __m256i __I,
+ __m256i __B) {
+ return (__m256i) __builtin_ia32_vpermt2vard256_mask ((__v8si) __I
+ /* idx */ ,
+ (__v8si) __A,
+ (__v8si) __B,
+ (__mmask8) __U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_maskz_permutex2var_epi32 (__mmask8 __U, __m256i __A,
+ __m256i __I, __m256i __B) {
+ return (__m256i) __builtin_ia32_vpermt2vard256_maskz ((__v8si) __I
+ /* idx */ ,
+ (__v8si) __A,
+ (__v8si) __B,
+ (__mmask8)
+ __U);
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_permutex2var_pd (__m128d __A, __m128i __I, __m128d __B) {
+ return (__m128d) __builtin_ia32_vpermt2varpd128_mask ((__v2di) __I
+ /* idx */ ,
+ (__v2df) __A,
+ (__v2df) __B,
+ (__mmask8) -
+ 1);
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_mask_permutex2var_pd (__m128d __A, __mmask8 __U, __m128i __I,
+ __m128d __B) {
+ return (__m128d) __builtin_ia32_vpermt2varpd128_mask ((__v2di) __I
+ /* idx */ ,
+ (__v2df) __A,
+ (__v2df) __B,
+ (__mmask8)
+ __U);
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_maskz_permutex2var_pd (__mmask8 __U, __m128d __A, __m128i __I,
+ __m128d __B) {
+ return (__m128d) __builtin_ia32_vpermt2varpd128_maskz ((__v2di) __I
+ /* idx */ ,
+ (__v2df) __A,
+ (__v2df) __B,
+ (__mmask8)
+ __U);
+}
+
+static __inline__ __m256d __DEFAULT_FN_ATTRS
+_mm256_permutex2var_pd (__m256d __A, __m256i __I, __m256d __B) {
+ return (__m256d) __builtin_ia32_vpermt2varpd256_mask ((__v4di) __I
+ /* idx */ ,
+ (__v4df) __A,
+ (__v4df) __B,
+ (__mmask8) -
+ 1);
+}
+
+static __inline__ __m256d __DEFAULT_FN_ATTRS
+_mm256_mask_permutex2var_pd (__m256d __A, __mmask8 __U, __m256i __I,
+ __m256d __B) {
+ return (__m256d) __builtin_ia32_vpermt2varpd256_mask ((__v4di) __I
+ /* idx */ ,
+ (__v4df) __A,
+ (__v4df) __B,
+ (__mmask8)
+ __U);
+}
+
+static __inline__ __m256d __DEFAULT_FN_ATTRS
+_mm256_maskz_permutex2var_pd (__mmask8 __U, __m256d __A, __m256i __I,
+ __m256d __B) {
+ return (__m256d) __builtin_ia32_vpermt2varpd256_maskz ((__v4di) __I
+ /* idx */ ,
+ (__v4df) __A,
+ (__v4df) __B,
+ (__mmask8)
+ __U);
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_permutex2var_ps (__m128 __A, __m128i __I, __m128 __B) {
+ return (__m128) __builtin_ia32_vpermt2varps128_mask ((__v4si) __I
+ /* idx */ ,
+ (__v4sf) __A,
+ (__v4sf) __B,
+ (__mmask8) -1);
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_mask_permutex2var_ps (__m128 __A, __mmask8 __U, __m128i __I,
+ __m128 __B) {
+ return (__m128) __builtin_ia32_vpermt2varps128_mask ((__v4si) __I
+ /* idx */ ,
+ (__v4sf) __A,
+ (__v4sf) __B,
+ (__mmask8) __U);
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_maskz_permutex2var_ps (__mmask8 __U, __m128 __A, __m128i __I,
+ __m128 __B) {
+ return (__m128) __builtin_ia32_vpermt2varps128_maskz ((__v4si) __I
+ /* idx */ ,
+ (__v4sf) __A,
+ (__v4sf) __B,
+ (__mmask8)
+ __U);
+}
+
+static __inline__ __m256 __DEFAULT_FN_ATTRS
+_mm256_permutex2var_ps (__m256 __A, __m256i __I, __m256 __B) {
+ return (__m256) __builtin_ia32_vpermt2varps256_mask ((__v8si) __I
+ /* idx */ ,
+ (__v8sf) __A,
+ (__v8sf) __B,
+ (__mmask8) -1);
+}
+
+static __inline__ __m256 __DEFAULT_FN_ATTRS
+_mm256_mask_permutex2var_ps (__m256 __A, __mmask8 __U, __m256i __I,
+ __m256 __B) {
+ return (__m256) __builtin_ia32_vpermt2varps256_mask ((__v8si) __I
+ /* idx */ ,
+ (__v8sf) __A,
+ (__v8sf) __B,
+ (__mmask8) __U);
+}
+
+static __inline__ __m256 __DEFAULT_FN_ATTRS
+_mm256_maskz_permutex2var_ps (__mmask8 __U, __m256 __A, __m256i __I,
+ __m256 __B) {
+ return (__m256) __builtin_ia32_vpermt2varps256_maskz ((__v8si) __I
+ /* idx */ ,
+ (__v8sf) __A,
+ (__v8sf) __B,
+ (__mmask8)
+ __U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_permutex2var_epi64 (__m128i __A, __m128i __I, __m128i __B) {
+ return (__m128i) __builtin_ia32_vpermt2varq128_mask ((__v2di) __I
+ /* idx */ ,
+ (__v2di) __A,
+ (__v2di) __B,
+ (__mmask8) -1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_mask_permutex2var_epi64 (__m128i __A, __mmask8 __U, __m128i __I,
+ __m128i __B) {
+ return (__m128i) __builtin_ia32_vpermt2varq128_mask ((__v2di) __I
+ /* idx */ ,
+ (__v2di) __A,
+ (__v2di) __B,
+ (__mmask8) __U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_maskz_permutex2var_epi64 (__mmask8 __U, __m128i __A, __m128i __I,
+ __m128i __B) {
+ return (__m128i) __builtin_ia32_vpermt2varq128_maskz ((__v2di) __I
+ /* idx */ ,
+ (__v2di) __A,
+ (__v2di) __B,
+ (__mmask8)
+ __U);
+}
+
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_permutex2var_epi64 (__m256i __A, __m256i __I, __m256i __B) {
+ return (__m256i) __builtin_ia32_vpermt2varq256_mask ((__v4di) __I
+ /* idx */ ,
+ (__v4di) __A,
+ (__v4di) __B,
+ (__mmask8) -1);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_mask_permutex2var_epi64 (__m256i __A, __mmask8 __U, __m256i __I,
+ __m256i __B) {
+ return (__m256i) __builtin_ia32_vpermt2varq256_mask ((__v4di) __I
+ /* idx */ ,
+ (__v4di) __A,
+ (__v4di) __B,
+ (__mmask8) __U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_maskz_permutex2var_epi64 (__mmask8 __U, __m256i __A,
+ __m256i __I, __m256i __B) {
+ return (__m256i) __builtin_ia32_vpermt2varq256_maskz ((__v4di) __I
+ /* idx */ ,
+ (__v4di) __A,
+ (__v4di) __B,
+ (__mmask8)
+ __U);
+}
+
#undef __DEFAULT_FN_ATTRS
#endif /* __AVX512VLINTRIN_H */
Modified: cfe/trunk/test/CodeGen/avx512vl-builtins.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vl-builtins.c?rev=243409&r1=243408&r2=243409&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/avx512vl-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512vl-builtins.c Tue Jul 28 07:04:40 2015
@@ -3007,3 +3007,243 @@ void test_mm256_mask_i32scatter_epi32(in
// CHECK: @llvm.x86.avx512.scattersiv8.si
return _mm256_mask_i32scatter_epi32(__addr,__mask,__index,__v1,2);
}
+__m128d test_mm_mask_sqrt_pd(__m128d __W, __mmask8 __U, __m128d __A) {
+ // CHECK-LABEL: @test_mm_mask_sqrt_pd
+ // CHECK: @llvm.x86.avx512.mask.sqrt.pd.128
+ return _mm_mask_sqrt_pd(__W,__U,__A);
+}
+__m128d test_mm_maskz_sqrt_pd(__mmask8 __U, __m128d __A) {
+ // CHECK-LABEL: @test_mm_maskz_sqrt_pd
+ // CHECK: @llvm.x86.avx512.mask.sqrt.pd.128
+ return _mm_maskz_sqrt_pd(__U,__A);
+}
+__m256d test_mm256_mask_sqrt_pd(__m256d __W, __mmask8 __U, __m256d __A) {
+ // CHECK-LABEL: @test_mm256_mask_sqrt_pd
+ // CHECK: @llvm.x86.avx512.mask.sqrt.pd.256
+ return _mm256_mask_sqrt_pd(__W,__U,__A);
+}
+__m256d test_mm256_maskz_sqrt_pd(__mmask8 __U, __m256d __A) {
+ // CHECK-LABEL: @test_mm256_maskz_sqrt_pd
+ // CHECK: @llvm.x86.avx512.mask.sqrt.pd.256
+ return _mm256_maskz_sqrt_pd(__U,__A);
+}
+__m128 test_mm_mask_sqrt_ps(__m128 __W, __mmask8 __U, __m128 __A) {
+ // CHECK-LABEL: @test_mm_mask_sqrt_ps
+ // CHECK: @llvm.x86.avx512.mask.sqrt.ps.128
+ return _mm_mask_sqrt_ps(__W,__U,__A);
+}
+__m128 test_mm_maskz_sqrt_ps(__mmask8 __U, __m128 __A) {
+ // CHECK-LABEL: @test_mm_maskz_sqrt_ps
+ // CHECK: @llvm.x86.avx512.mask.sqrt.ps.128
+ return _mm_maskz_sqrt_ps(__U,__A);
+}
+__m256 test_mm256_mask_sqrt_ps(__m256 __W, __mmask8 __U, __m256 __A) {
+ // CHECK-LABEL: @test_mm256_mask_sqrt_ps
+ // CHECK: @llvm.x86.avx512.mask.sqrt.ps.256
+ return _mm256_mask_sqrt_ps(__W,__U,__A);
+}
+__m256 test_mm256_maskz_sqrt_ps(__mmask8 __U, __m256 __A) {
+ // CHECK-LABEL: @test_mm256_maskz_sqrt_ps
+ // CHECK: @llvm.x86.avx512.mask.sqrt.ps.256
+ return _mm256_maskz_sqrt_ps(__U,__A);
+}
+__m128d test_mm_mask_sub_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
+ // CHECK-LABEL: @test_mm_mask_sub_pd
+ // CHECK: @llvm.x86.avx512.mask.sub.pd.128
+ return _mm_mask_sub_pd(__W,__U,__A,__B);
+}
+__m128d test_mm_maskz_sub_pd(__mmask8 __U, __m128d __A, __m128d __B) {
+ // CHECK-LABEL: @test_mm_maskz_sub_pd
+ // CHECK: @llvm.x86.avx512.mask.sub.pd.128
+ return _mm_maskz_sub_pd(__U,__A,__B);
+}
+__m256d test_mm256_mask_sub_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
+ // CHECK-LABEL: @test_mm256_mask_sub_pd
+ // CHECK: @llvm.x86.avx512.mask.sub.pd.256
+ return _mm256_mask_sub_pd(__W,__U,__A,__B);
+}
+__m256d test_mm256_maskz_sub_pd(__mmask8 __U, __m256d __A, __m256d __B) {
+ // CHECK-LABEL: @test_mm256_maskz_sub_pd
+ // CHECK: @llvm.x86.avx512.mask.sub.pd.256
+ return _mm256_maskz_sub_pd(__U,__A,__B);
+}
+__m128 test_mm_mask_sub_ps(__m128 __W, __mmask16 __U, __m128 __A, __m128 __B) {
+ // CHECK-LABEL: @test_mm_mask_sub_ps
+ // CHECK: @llvm.x86.avx512.mask.sub.ps.128
+ return _mm_mask_sub_ps(__W,__U,__A,__B);
+}
+__m128 test_mm_maskz_sub_ps(__mmask16 __U, __m128 __A, __m128 __B) {
+ // CHECK-LABEL: @test_mm_maskz_sub_ps
+ // CHECK: @llvm.x86.avx512.mask.sub.ps.128
+ return _mm_maskz_sub_ps(__U,__A,__B);
+}
+__m256 test_mm256_mask_sub_ps(__m256 __W, __mmask16 __U, __m256 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_mask_sub_ps
+ // CHECK: @llvm.x86.avx512.mask.sub.ps.256
+ return _mm256_mask_sub_ps(__W,__U,__A,__B);
+}
+__m256 test_mm256_maskz_sub_ps(__mmask16 __U, __m256 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_maskz_sub_ps
+ // CHECK: @llvm.x86.avx512.mask.sub.ps.256
+ return _mm256_maskz_sub_ps(__U,__A,__B);
+}
+__m128i test_mm_mask2_permutex2var_epi32(__m128i __A, __m128i __I, __mmask8 __U, __m128i __B) {
+ // CHECK-LABEL: @test_mm_mask2_permutex2var_epi32
+ // CHECK: @llvm.x86.avx512.mask.vpermi2var.d.128
+ return _mm_mask2_permutex2var_epi32(__A,__I,__U,__B);
+}
+__m256i test_mm256_mask2_permutex2var_epi32(__m256i __A, __m256i __I, __mmask8 __U, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_mask2_permutex2var_epi32
+ // CHECK: @llvm.x86.avx512.mask.vpermi2var.d.256
+ return _mm256_mask2_permutex2var_epi32(__A,__I,__U,__B);
+}
+__m128d test_mm_mask2_permutex2var_pd(__m128d __A, __m128i __I, __mmask8 __U, __m128d __B) {
+ // CHECK-LABEL: @test_mm_mask2_permutex2var_pd
+ // CHECK: @llvm.x86.avx512.mask.vpermi2var.pd.128
+ return _mm_mask2_permutex2var_pd(__A,__I,__U,__B);
+}
+__m256d test_mm256_mask2_permutex2var_pd(__m256d __A, __m256i __I, __mmask8 __U, __m256d __B) {
+ // CHECK-LABEL: @test_mm256_mask2_permutex2var_pd
+ // CHECK: @llvm.x86.avx512.mask.vpermi2var.pd.256
+ return _mm256_mask2_permutex2var_pd(__A,__I,__U,__B);
+}
+__m128 test_mm_mask2_permutex2var_ps(__m128 __A, __m128i __I, __mmask8 __U, __m128 __B) {
+ // CHECK-LABEL: @test_mm_mask2_permutex2var_ps
+ // CHECK: @llvm.x86.avx512.mask.vpermi2var.ps.128
+ return _mm_mask2_permutex2var_ps(__A,__I,__U,__B);
+}
+__m256 test_mm256_mask2_permutex2var_ps(__m256 __A, __m256i __I, __mmask8 __U, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_mask2_permutex2var_ps
+ // CHECK: @llvm.x86.avx512.mask.vpermi2var.ps.256
+ return _mm256_mask2_permutex2var_ps(__A,__I,__U,__B);
+}
+__m128i test_mm_mask2_permutex2var_epi64(__m128i __A, __m128i __I, __mmask8 __U, __m128i __B) {
+ // CHECK-LABEL: @test_mm_mask2_permutex2var_epi64
+ // CHECK: @llvm.x86.avx512.mask.vpermi2var.q.128
+ return _mm_mask2_permutex2var_epi64(__A,__I,__U,__B);
+}
+__m256i test_mm256_mask2_permutex2var_epi64(__m256i __A, __m256i __I, __mmask8 __U, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_mask2_permutex2var_epi64
+ // CHECK: @llvm.x86.avx512.mask.vpermi2var.q.256
+ return _mm256_mask2_permutex2var_epi64(__A,__I,__U,__B);
+}
+__m128i test_mm_permutex2var_epi32(__m128i __A, __m128i __I, __m128i __B) {
+ // CHECK-LABEL: @test_mm_permutex2var_epi32
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.d.128
+ return _mm_permutex2var_epi32(__A,__I,__B);
+}
+__m128i test_mm_mask_permutex2var_epi32(__m128i __A, __mmask8 __U, __m128i __I, __m128i __B) {
+ // CHECK-LABEL: @test_mm_mask_permutex2var_epi32
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.d.128
+ return _mm_mask_permutex2var_epi32(__A,__U,__I,__B);
+}
+__m128i test_mm_maskz_permutex2var_epi32(__mmask8 __U, __m128i __A, __m128i __I, __m128i __B) {
+ // CHECK-LABEL: @test_mm_maskz_permutex2var_epi32
+ // CHECK: @llvm.x86.avx512.maskz.vpermt2var.d.128
+ return _mm_maskz_permutex2var_epi32(__U,__A,__I,__B);
+}
+__m256i test_mm256_permutex2var_epi32(__m256i __A, __m256i __I, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_permutex2var_epi32
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.d.256
+ return _mm256_permutex2var_epi32(__A,__I,__B);
+}
+__m256i test_mm256_mask_permutex2var_epi32(__m256i __A, __mmask8 __U, __m256i __I, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_mask_permutex2var_epi32
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.d.256
+ return _mm256_mask_permutex2var_epi32(__A,__U,__I,__B);
+}
+__m256i test_mm256_maskz_permutex2var_epi32(__mmask8 __U, __m256i __A, __m256i __I, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_maskz_permutex2var_epi32
+ // CHECK: @llvm.x86.avx512.maskz.vpermt2var.d.256
+ return _mm256_maskz_permutex2var_epi32(__U,__A,__I,__B);
+}
+__m128d test_mm_permutex2var_pd(__m128d __A, __m128i __I, __m128d __B) {
+ // CHECK-LABEL: @test_mm_permutex2var_pd
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.pd.128
+ return _mm_permutex2var_pd(__A,__I,__B);
+}
+__m128d test_mm_mask_permutex2var_pd(__m128d __A, __mmask8 __U, __m128i __I, __m128d __B) {
+ // CHECK-LABEL: @test_mm_mask_permutex2var_pd
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.pd.128
+ return _mm_mask_permutex2var_pd(__A,__U,__I,__B);
+}
+__m128d test_mm_maskz_permutex2var_pd(__mmask8 __U, __m128d __A, __m128i __I, __m128d __B) {
+ // CHECK-LABEL: @test_mm_maskz_permutex2var_pd
+ // CHECK: @llvm.x86.avx512.maskz.vpermt2var.pd.128
+ return _mm_maskz_permutex2var_pd(__U,__A,__I,__B);
+}
+__m256d test_mm256_permutex2var_pd(__m256d __A, __m256i __I, __m256d __B) {
+ // CHECK-LABEL: @test_mm256_permutex2var_pd
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.pd.256
+ return _mm256_permutex2var_pd(__A,__I,__B);
+}
+__m256d test_mm256_mask_permutex2var_pd(__m256d __A, __mmask8 __U, __m256i __I, __m256d __B) {
+ // CHECK-LABEL: @test_mm256_mask_permutex2var_pd
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.pd.256
+ return _mm256_mask_permutex2var_pd(__A,__U,__I,__B);
+}
+__m256d test_mm256_maskz_permutex2var_pd(__mmask8 __U, __m256d __A, __m256i __I, __m256d __B) {
+ // CHECK-LABEL: @test_mm256_maskz_permutex2var_pd
+ // CHECK: @llvm.x86.avx512.maskz.vpermt2var.pd.256
+ return _mm256_maskz_permutex2var_pd(__U,__A,__I,__B);
+}
+__m128 test_mm_permutex2var_ps(__m128 __A, __m128i __I, __m128 __B) {
+ // CHECK-LABEL: @test_mm_permutex2var_ps
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.ps.128
+ return _mm_permutex2var_ps(__A,__I,__B);
+}
+__m128 test_mm_mask_permutex2var_ps(__m128 __A, __mmask8 __U, __m128i __I, __m128 __B) {
+ // CHECK-LABEL: @test_mm_mask_permutex2var_ps
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.ps.128
+ return _mm_mask_permutex2var_ps(__A,__U,__I,__B);
+}
+__m128 test_mm_maskz_permutex2var_ps(__mmask8 __U, __m128 __A, __m128i __I, __m128 __B) {
+ // CHECK-LABEL: @test_mm_maskz_permutex2var_ps
+ // CHECK: @llvm.x86.avx512.maskz.vpermt2var.ps.128
+ return _mm_maskz_permutex2var_ps(__U,__A,__I,__B);
+}
+__m256 test_mm256_permutex2var_ps(__m256 __A, __m256i __I, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_permutex2var_ps
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.ps.256
+ return _mm256_permutex2var_ps(__A,__I,__B);
+}
+__m256 test_mm256_mask_permutex2var_ps(__m256 __A, __mmask8 __U, __m256i __I, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_mask_permutex2var_ps
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.ps.256
+ return _mm256_mask_permutex2var_ps(__A,__U,__I,__B);
+}
+__m256 test_mm256_maskz_permutex2var_ps(__mmask8 __U, __m256 __A, __m256i __I, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_maskz_permutex2var_ps
+ // CHECK: @llvm.x86.avx512.maskz.vpermt2var.ps.256
+ return _mm256_maskz_permutex2var_ps(__U,__A,__I,__B);
+}
+__m128i test_mm_permutex2var_epi64(__m128i __A, __m128i __I, __m128i __B) {
+ // CHECK-LABEL: @test_mm_permutex2var_epi64
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.q.128
+ return _mm_permutex2var_epi64(__A,__I,__B);
+}
+__m128i test_mm_mask_permutex2var_epi64(__m128i __A, __mmask8 __U, __m128i __I, __m128i __B) {
+ // CHECK-LABEL: @test_mm_mask_permutex2var_epi64
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.q.128
+ return _mm_mask_permutex2var_epi64(__A,__U,__I,__B);
+}
+__m128i test_mm_maskz_permutex2var_epi64(__mmask8 __U, __m128i __A, __m128i __I, __m128i __B) {
+ // CHECK-LABEL: @test_mm_maskz_permutex2var_epi64
+ // CHECK: @llvm.x86.avx512.maskz.vpermt2var.q.128
+ return _mm_maskz_permutex2var_epi64(__U,__A,__I,__B);
+}
+__m256i test_mm256_permutex2var_epi64(__m256i __A, __m256i __I, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_permutex2var_epi64
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.q.256
+ return _mm256_permutex2var_epi64(__A,__I,__B);
+}
+__m256i test_mm256_mask_permutex2var_epi64(__m256i __A, __mmask8 __U, __m256i __I, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_mask_permutex2var_epi64
+ // CHECK: @llvm.x86.avx512.mask.vpermt2var.q.256
+ return _mm256_mask_permutex2var_epi64(__A,__U,__I,__B);
+}
+__m256i test_mm256_maskz_permutex2var_epi64(__mmask8 __U, __m256i __A, __m256i __I, __m256i __B) {
+ // CHECK-LABEL: @test_mm256_maskz_permutex2var_epi64
+ // CHECK: @llvm.x86.avx512.maskz.vpermt2var.q.256
+ return _mm256_maskz_permutex2var_epi64(__U,__A,__I,__B);
+}
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