[PATCH] [Clang - ARM/AArch64] Add ACLE special register intrinsics (10.1)

Luke Cheeseman luke.cheeseman at arm.com
Tue May 12 02:40:48 PDT 2015


This patch implements clang support for the ACLE special register intrinsics in section 10.1, __arm_{w,r}sr{,p,64}.

This includes arm_acle.h definitions with builtins and codegen to support these, the intrinsics are implemented by generating read/write_register calls which get appropriately lowered in the backend based on the register string provided. SemaChecking is also implemented to fault invalid parameters, however SemaChecking currently only supports checking in when the register string is in an encoded form, e.g. "cp1:2:c3:c4:5", that the encoding is valid. Otherwise, checking just assumes that the string is a special register value, e.g. "CPSR"; this means that if the register value passed is not a valid special register value, it passes checking and reports an error in the backend when attempting to lower the read/write_register intrinsic. I would like to have more checking on these values in the frontend to provide more useful diagnostics but couldn't think of a clean and nice way of doing it.

http://reviews.llvm.org/D9697

Files:
  include/clang/Basic/BuiltinsAArch64.def
  include/clang/Basic/BuiltinsARM.def
  include/clang/Basic/DiagnosticSemaKinds.td
  include/clang/Sema/Sema.h
  lib/CodeGen/CGBuiltin.cpp
  lib/Headers/arm_acle.h
  lib/Sema/SemaChecking.cpp
  test/CodeGen/arm_acle.c
  test/CodeGen/builtins-arm.c
  test/CodeGen/builtins-arm64.c
  test/Sema/aarch64-special-register.c
  test/Sema/arm-special-register.c

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