[PATCH] [PATCH v3] [PowerPC] Add Hardware Transaction Memory builtins support
zatrazz at gmail.com
Tue Mar 10 13:09:46 PDT 2015
This patch adds Hardware Transaction Memory (HTM) support supported by
ISA 2.07 (POWER8). The intrinsic support is based on GCC one , with
both 'PowerPC HTM Low Level Built-in Functions' and 'PowerPC HTM High
Level Inline Functions' implemented.
Along with builtins a new driver switch is added to enable/disable HTM
instruction support (-mhtm) and a header with common definitions (mostly
to parse the TFHAR register value). The HTM switch also sets a
preprocessor builtin __HTM__.
The HTM usage requires a recently newer kernel with PPC HTM enabled.
Tested on powerpc64 and powerpc64le.
This is send along a llvm patch to enabled the builtins and option
>From previous interactions, there is no need to check for negative values for
some builtins because ConstantInt::getZExtValue() returns an unsigned value.
Changes from previous version (v2):
- Fixed the error message for tsr builtin
Changes from previous version (v1):
- Fixed grammatical error raised by Will Schmidt
- Change __builtin_tcheck signature to no accept any arguments. The CR fiels
will be selected by the backend and the result will be adjusted accordingly.
- The return value for __builtin_tend, __builtin_tabort* has changed to return
the full 4-bit CR value as its return value (similar to the __built_ttest).
The __builtin_tbegin continue to return 0 or 1 as previous patch.
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