r220946 - [AArch64]Add 2 intrinsics vmov_n_p64/vmovq_n_p64, the alias for vdup_n_p64/vdup_n_p64.

[Hao Liu]

Author: haoliu
Date: Thu Oct 30 21:41:37 2014
New Revision: 220946

URL: http://llvm.org/viewvc/llvm-project?rev=220946&view=rev
Log:
[AArch64]Add 2 intrinsics vmov_n_p64/vmovq_n_p64, the alias for vdup_n_p64/vdup_n_p64.
As this change is too small, commit it directly.

Modified:
    cfe/trunk/include/clang/Basic/arm_neon.td
    cfe/trunk/test/CodeGen/aarch64-poly64.c

Modified: cfe/trunk/include/clang/Basic/arm_neon.td
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/arm_neon.td?rev=220946&r1=220945&r2=220946&view=diff
==============================================================================
--- cfe/trunk/include/clang/Basic/arm_neon.td (original)
+++ cfe/trunk/include/clang/Basic/arm_neon.td Thu Oct 30 21:41:37 2014
@@ -1077,7 +1077,7 @@ def VDUP_LANE2: WOpInst<"vdup_laneq", "d
                   "csilUcUsUiUlPcPshfdQcQsQiQlQPcQPsQUcQUsQUiQUlQhQfQdPlQPl",
                         OP_DUP_LN>;
 def DUP_N   : WOpInst<"vdup_n", "ds", "dQdPlQPl", OP_DUP>;
-def MOV_N   : WOpInst<"vmov_n", "ds", "dQd", OP_DUP>;
+def MOV_N   : WOpInst<"vmov_n", "ds", "dQdPlQPl", OP_DUP>;
 
 ////////////////////////////////////////////////////////////////////////////////
 def COMBINE : NoTestOpInst<"vcombine", "kdd", "dPl", OP_CONC>;

Modified: cfe/trunk/test/CodeGen/aarch64-poly64.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-poly64.c?rev=220946&r1=220945&r2=220946&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/aarch64-poly64.c (original)
+++ cfe/trunk/test/CodeGen/aarch64-poly64.c Thu Oct 30 21:41:37 2014
@@ -102,6 +102,18 @@ poly64x2_t test_vdupq_n_p64(poly64_t a)
   // CHECK: dup {{v[0-9]+}}.2d, {{x[0-9]+}}
 }
 
+poly64x1_t test_vmov_n_p64(poly64_t a) {
+  // CHECK-LABEL: test_vmov_n_p64
+  return vmov_n_p64(a);
+  // CHECK: fmov {{d[0-9]+}}, {{x[0-9]+}}
+}
+
+poly64x2_t test_vmovq_n_p64(poly64_t a) {
+  // CHECK-LABEL: test_vmovq_n_p64
+  return vmovq_n_p64(a);
+  // CHECK: dup {{v[0-9]+}}.2d, {{x[0-9]+}}
+}
+
 poly64x1_t test_vdup_lane_p64(poly64x1_t vec) {
   // CHECK-LABEL: test_vdup_lane_p64
   return vdup_lane_p64(vec, 0);