r191957 - Don't assume instruction names in the output.

[Rafael Espindola]

Author: rafael
Date: Fri Oct  4 09:42:00 2013
New Revision: 191957

URL: http://llvm.org/viewvc/llvm-project?rev=191957&view=rev
Log:
Don't assume instruction names in the output.

Modified:
    cfe/trunk/test/CodeGen/aarch64-neon-shifts.c
    cfe/trunk/test/CodeGen/arm-neon-shifts.c

Modified: cfe/trunk/test/CodeGen/aarch64-neon-shifts.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-shifts.c?rev=191957&r1=191956&r2=191957&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/aarch64-neon-shifts.c (original)
+++ cfe/trunk/test/CodeGen/aarch64-neon-shifts.c Fri Oct  4 09:42:00 2013
@@ -6,13 +6,13 @@
 
 uint8x8_t test_shift_vshr(uint8x8_t a) {
   // CHECK-LABEL: test_shift_vshr
-  // CHECK: %vshr_n = lshr <8 x i8> %a, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
+  // CHECK: %{{.*}} = lshr <8 x i8> %a, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
   return vshr_n_u8(a, 5);
 }
 
 int8x8_t test_shift_vshr_smax(int8x8_t a) {
   // CHECK-LABEL: test_shift_vshr_smax
-  // CHECK: %vshr_n = ashr <8 x i8> %a, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
+  // CHECK: %{{.*}} = ashr <8 x i8> %a, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
   return vshr_n_s8(a, 8);
 }
 
@@ -24,15 +24,15 @@ uint8x8_t test_shift_vshr_umax(uint8x8_t
 
 uint8x8_t test_shift_vsra(uint8x8_t a, uint8x8_t b) {
   // CHECK-LABEL: test_shift_vsra
-  // CHECK: %vsra_n = lshr <8 x i8> %b, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
-  // CHECK: %0 = add <8 x i8> %vsra_n, %a
+  // CHECK: %[[SHR:.*]] = lshr <8 x i8> %b, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
+  // CHECK: %{{.*}} = add <8 x i8> %[[SHR]], %a
   return vsra_n_u8(a, b, 5);
 }
 
 int8x8_t test_shift_vsra_smax(int8x8_t a, int8x8_t b) {
   // CHECK-LABEL: test_shift_vsra_smax
-  // CHECK: %vsra_n = ashr <8 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
-  // CHECK: %0 = add <8 x i8> %vsra_n, %a
+  // CHECK: %[[SHR:.*]] = ashr <8 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
+  // CHECK: %{{.*}} = add <8 x i8> %[[SHR]], %a
   return vsra_n_s8(a, b, 8);
 }
 

Modified: cfe/trunk/test/CodeGen/arm-neon-shifts.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-neon-shifts.c?rev=191957&r1=191956&r2=191957&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/arm-neon-shifts.c (original)
+++ cfe/trunk/test/CodeGen/arm-neon-shifts.c Fri Oct  4 09:42:00 2013
@@ -8,13 +8,13 @@
 
 uint8x8_t test_shift_vshr(uint8x8_t a) {
   // CHECK-LABEL: test_shift_vshr
-  // CHECK: %vshr_n = lshr <8 x i8> %a, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
+  // CHECK: %{{.*}} = lshr <8 x i8> %a, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
   return vshr_n_u8(a, 5);
 }
 
 int8x8_t test_shift_vshr_smax(int8x8_t a) {
   // CHECK-LABEL: test_shift_vshr_smax
-  // CHECK: %vshr_n = ashr <8 x i8> %a, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
+  // CHECK: %{{.*}} = ashr <8 x i8> %a, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
   return vshr_n_s8(a, 8);
 }
 
@@ -26,15 +26,15 @@ uint8x8_t test_shift_vshr_umax(uint8x8_t
 
 uint8x8_t test_shift_vsra(uint8x8_t a, uint8x8_t b) {
   // CHECK-LABEL: test_shift_vsra
-  // CHECK: %vsra_n = lshr <8 x i8> %b, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
-  // CHECK: %0 = add <8 x i8> %vsra_n, %a
+  // CHECK: %[[SHR:.*]] = lshr <8 x i8> %b, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
+  // CHECK: %{{.*}} = add <8 x i8> %[[SHR]], %a
   return vsra_n_u8(a, b, 5);
 }
 
 int8x8_t test_shift_vsra_smax(int8x8_t a, int8x8_t b) {
   // CHECK-LABEL: test_shift_vsra_smax
-  // CHECK: %vsra_n = ashr <8 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
-  // CHECK: %0 = add <8 x i8> %vsra_n, %a
+  // CHECK: %[[SHR:.*]] = ashr <8 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
+  // CHECK: %{{.*}} = add <8 x i8> %[[SHR]], %a
   return vsra_n_s8(a, b, 8);
 }