[PATCH] Implement aarch64 neon instruction class SIMD copy
kevinqindev at gmail.com
Fri Sep 27 00:17:09 PDT 2013
This patch implemented aarch64 neon SIMD copy instruction class.
I generated this patch on top of aarch64 neon SIMD by element patch(clang : http://llvm-reviews.chandlerc.com/D1752 , llvm : http://llvm-reviews.chandlerc.com/D1753), bacause we shared DUP node and lowerVECTOR_SHUFFLE function.
This patch contains:
1. Covered SIMD dup instruction.
2. Implemented related ACLE intrinsic : vget_lane, vset_lane, vcopy_lane, vcreate, vdup_n, vdup_lane, vmov_n
1. In AAPCS64, half float can serve as setters and getters for function, so some ACLE intrinsic would receive or provide a variable with half float. But this feature isn't supported by Clang at moment. Even when I hack diagnose detector to avoid throwing error message, all half float will be converted to i16 in IR.
2. There is no v4f16 in IR, which is used by some ACLE intrinsic.
Considering above problem, all ACLE intrinsic with half float isn't implemented in these patches. We will try to figure out how to implement this feature.
Also, I have seen the comments from Tim on patch of aarch64 neon SIMD by element , but because my patches are based on that, so I will make some change after Jiangning post his 2nd edittion patch.
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