[PATCH][AArch64]RE: patches with initial implementation of Neon scalar instructions

Jiangning Liu liujiangning1 at gmail.com
Wed Sep 11 23:32:27 PDT 2013


I personally think acle functions for neon should be expected to generate
neon instruction, because it would be able to ask compiler to generate
special instructions supporting complex functionality.

The test case given by Tim should be able to still generate "add d0, d1, d0",
if you define vaddd_s64 using vadd_s64, rather than using an IR intrinsic.

Since most of middle end optimizations are based on scalar data type, if we
use v1ixx instead of ixx, do we have any scenario to lose optimization
opportunities in middle end? Or we don't care about that at all, because
this is being introduced by acle intrinsics. I'm also fine with this

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/cfe-commits/attachments/20130912/6ac84931/attachment.html>

More information about the cfe-commits mailing list