[PATCH][AArch64] implement aarch64 neon instruction class AdvSIMD (3 diff)

[Jiangning Liu]

Hi Tim,

I think essentially you are intending to remove some of the builtins from
32-bit ARM target. My aarch64 patch doesn't introduce any new builtin and
the the list below contains ARM builtins being used for aarch64.

ARM::BI__builtin_neon_vaddhn_v     // remove
ARM::BI__builtin_neon_vraddhn_v    // keep
ARM::BI__builtin_neon_vsubhn_v     // remove
ARM::BI__builtin_neon_vrsubhn_v    // keep
ARM::BI__builtin_neon_vmull_v       // remove
ARM::BI__builtin_neon_vqdmull_v    // keep
ARM::BI__builtin_neon_vqdmlal_v    // remove
ARM::BI__builtin_neon_vqdmlsl_v    // remove

I add comments for each one, and can you confirm this list?

Thanks,
-Jiangning



2013/8/27 Jiangning Liu <liujiangning1 at gmail.com>

>
> Don't these have reasonably simple LLVM IR representations? For example:
>>
>> define <2 x i32> @addhn(<2 x i64> %lhs, <2 x i64> %rhs) {
>>   %sum = add <2 x i64> %lhs, %rhs
>>   %shift = shl <2 x i64> %sum, <i64 32, i64 32>
>>   %trunc = trunc <2 x i64> %shift to <2 x i32>
>>   ret <2 x i32> %trunc
>> }
>>
>>
> Do you mean to use lshr instead of shl, because addhn is to get high
> narrow, so we could have,
>
> define <2 x i32> @addhn(<2 x i64> %lhs, <2 x i64> %rhs) {
>   %sum = add <2 x i64> %lhs, %rhs
>   %shift = lshr <2 x i64> %sum, <i64 32, i64 32>
>
>   %trunc = trunc <2 x i64> %shift to <2 x i32>
>   ret <2 x i32> %trunc
> }
>
> Thanks,
> -Jiangning
>



-- 
Thanks,
-Jiangning
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