r188758 - Add AVX-512 feature flag and knl cpu to clang.

Craig Topper craig.topper at gmail.com
Tue Aug 20 08:02:32 PDT 2013


Oh yeah. I forgot that that requires additional changes. I'll do it later
tonight. Thanks


On Tue, Aug 20, 2013 at 6:51 AM, Rafael EspĂ­ndola <
rafael.espindola at gmail.com> wrote:

> Don't you want to add a -mavx512 (or -mavx-512) option too?
>
> On 20 August 2013 03:09, Craig Topper <craig.topper at gmail.com> wrote:
> > Author: ctopper
> > Date: Tue Aug 20 02:09:39 2013
> > New Revision: 188758
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=188758&view=rev
> > Log:
> > Add AVX-512 feature flag and knl cpu to clang.
> >
> > Modified:
> >     cfe/trunk/lib/Basic/Targets.cpp
> >     cfe/trunk/test/Preprocessor/predefined-arch-macros.c
> >
> > Modified: cfe/trunk/lib/Basic/Targets.cpp
> > URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=188758&r1=188757&r2=188758&view=diff
> >
> ==============================================================================
> > --- cfe/trunk/lib/Basic/Targets.cpp (original)
> > +++ cfe/trunk/lib/Basic/Targets.cpp Tue Aug 20 02:09:39 2013
> > @@ -1570,7 +1570,7 @@ const TargetInfo::AddlRegName AddlRegNam
> >  // most of the implementation can be shared.
> >  class X86TargetInfo : public TargetInfo {
> >    enum X86SSEEnum {
> > -    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
> > +    NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512
> >    } SSELevel;
> >    enum MMX3DNowEnum {
> >      NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
> > @@ -1675,6 +1675,10 @@ class X86TargetInfo : public TargetInfo
> >      CK_CoreAVX2,
> >      //@}
> >
> > +    /// \name Knights Landing
> > +    /// Knights Landing processor.
> > +    CK_KNL,
> > +
> >      /// \name K6
> >      /// K6 architecture processors.
> >      //@{
> > @@ -1818,6 +1822,7 @@ public:
> >        .Case("corei7-avx", CK_Corei7AVX)
> >        .Case("core-avx-i", CK_CoreAVXi)
> >        .Case("core-avx2", CK_CoreAVX2)
> > +      .Case("knl", CK_KNL)
> >        .Case("k6", CK_K6)
> >        .Case("k6-2", CK_K6_2)
> >        .Case("k6-3", CK_K6_3)
> > @@ -1892,6 +1897,7 @@ public:
> >      case CK_Corei7AVX:
> >      case CK_CoreAVXi:
> >      case CK_CoreAVX2:
> > +    case CK_KNL:
> >      case CK_Athlon64:
> >      case CK_Athlon64SSE3:
> >      case CK_AthlonFX:
> > @@ -1941,6 +1947,7 @@ void X86TargetInfo::getDefaultFeatures(l
> >    Features["pclmul"] = false;
> >    Features["avx"] = false;
> >    Features["avx2"] = false;
> > +  Features["avx512"] = false;
> >    Features["lzcnt"] = false;
> >    Features["rdrand"] = false;
> >    Features["bmi"] = false;
> > @@ -2024,6 +2031,18 @@ void X86TargetInfo::getDefaultFeatures(l
> >      setFeatureEnabled(Features, "rtm", true);
> >      setFeatureEnabled(Features, "fma", true);
> >      break;
> > +  case CK_KNL:
> > +    setFeatureEnabled(Features, "avx512", true);
> > +    setFeatureEnabled(Features, "aes", true);
> > +    setFeatureEnabled(Features, "pclmul", true);
> > +    setFeatureEnabled(Features, "lzcnt", true);
> > +    setFeatureEnabled(Features, "rdrnd", true);
> > +    setFeatureEnabled(Features, "f16c", true);
> > +    setFeatureEnabled(Features, "bmi", true);
> > +    setFeatureEnabled(Features, "bmi2", true);
> > +    setFeatureEnabled(Features, "rtm", true);
> > +    setFeatureEnabled(Features, "fma", true);
> > +    break;
> >    case CK_K6:
> >    case CK_WinChipC6:
> >      setFeatureEnabled(Features, "mmx", true);
> > @@ -2149,6 +2168,11 @@ bool X86TargetInfo::setFeatureEnabled(ll
> >        Features["mmx"] = Features["sse"] = Features["sse2"] =
> Features["sse3"] =
> >          Features["ssse3"] = Features["sse41"] = Features["sse42"] =
> >          Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
> > +    else if (Name == "avx512")
> > +      Features["mmx"] = Features["sse"] = Features["sse2"] =
> Features["sse3"] =
> > +        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
> > +        Features["popcnt"] = Features["avx"] = Features["avx2"] =
> > +        Features["avx512"] = true;
> >      else if (Name == "fma")
> >        Features["mmx"] = Features["sse"] = Features["sse2"] =
> Features["sse3"] =
> >          Features["ssse3"] = Features["sse41"] = Features["sse42"] =
> > @@ -2191,28 +2215,29 @@ bool X86TargetInfo::setFeatureEnabled(ll
> >        Features["sse"] = Features["sse2"] = Features["sse3"] =
> >          Features["ssse3"] = Features["sse41"] = Features["sse42"] =
> >          Features["sse4a"] = Features["avx"] = Features["avx2"] =
> > -        Features["fma"] = Features["fma4"] = Features["aes"] =
> > -        Features["pclmul"] = Features["xop"] = false;
> > +        Features["avx512"] = Features["fma"] = Features["fma4"] =
> > +        Features["aes"] = Features["pclmul"] = Features["xop"] = false;
> >      else if (Name == "sse2")
> >        Features["sse2"] = Features["sse3"] = Features["ssse3"] =
> >          Features["sse41"] = Features["sse42"] = Features["sse4a"] =
> > -        Features["avx"] = Features["avx2"] = Features["fma"] =
> > -        Features["fma4"] = Features["aes"] = Features["pclmul"] =
> > -        Features["xop"] = false;
> > +        Features["avx"] = Features["avx2"] = Features["avx512"] =
> > +        Features["fma"] = Features["fma4"] = Features["aes"] =
> > +        Features["pclmul"] = Features["xop"] = false;
> >      else if (Name == "sse3")
> >        Features["sse3"] = Features["ssse3"] = Features["sse41"] =
> >          Features["sse42"] = Features["sse4a"] = Features["avx"] =
> > -        Features["avx2"] = Features["fma"] = Features["fma4"] =
> > -        Features["xop"] = false;
> > +        Features["avx2"] = Features["avx512"] = Features["fma"] =
> > +        Features["fma4"] = Features["xop"] = false;
> >      else if (Name == "ssse3")
> >        Features["ssse3"] = Features["sse41"] = Features["sse42"] =
> > -        Features["avx"] = Features["avx2"] = Features["fma"] = false;
> > +        Features["avx"] = Features["avx2"] = Features["avx512"] =
> > +        Features["fma"] = false;
> >      else if (Name == "sse4" || Name == "sse4.1")
> >        Features["sse41"] = Features["sse42"] = Features["avx"] =
> > -        Features["avx2"] = Features["fma"] = false;
> > +        Features["avx2"] = Features["avx512"] = Features["fma"] = false;
> >      else if (Name == "sse4.2")
> >        Features["sse42"] = Features["avx"] = Features["avx2"] =
> > -        Features["fma"] = false;
> > +        Features["avx512"] = Features["fma"] = false;
> >      else if (Name == "3dnow")
> >        Features["3dnow"] = Features["3dnowa"] = false;
> >      else if (Name == "3dnowa")
> > @@ -2222,10 +2247,12 @@ bool X86TargetInfo::setFeatureEnabled(ll
> >      else if (Name == "pclmul")
> >        Features["pclmul"] = false;
> >      else if (Name == "avx")
> > -      Features["avx"] = Features["avx2"] = Features["fma"] =
> > -        Features["fma4"] = Features["xop"] = false;
> > +      Features["avx"] = Features["avx2"] = Features["avx512"] =
> > +        Features["fma"] = Features["fma4"] = Features["xop"] = false;
> >      else if (Name == "avx2")
> > -      Features["avx2"] = false;
> > +      Features["avx2"] = Features["avx512"] = false;
> > +    else if (Name == "avx512")
> > +      Features["avx512"] = false;
> >      else if (Name == "fma")
> >        Features["fma"] = false;
> >      else if (Name == "sse4a")
> > @@ -2345,6 +2372,7 @@ void X86TargetInfo::HandleTargetFeatures
> >
> >      assert(Features[i][0] == '+' && "Invalid target feature!");
> >      X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
> > +      .Case("avx512", AVX512)
> >        .Case("avx2", AVX2)
> >        .Case("avx", AVX)
> >        .Case("sse42", SSE42)
> > @@ -2455,6 +2483,9 @@ void X86TargetInfo::getTargetDefines(con
> >    case CK_CoreAVX2:
> >      defineCPUMacros(Builder, "corei7");
> >      break;
> > +  case CK_KNL:
> > +    defineCPUMacros(Builder, "knl");
> > +    break;
> >    case CK_K6_2:
> >      Builder.defineMacro("__k6_2__");
> >      Builder.defineMacro("__tune_k6_2__");
> > @@ -2568,6 +2599,8 @@ void X86TargetInfo::getTargetDefines(con
> >
> >    // Each case falls through to the previous one here.
> >    switch (SSELevel) {
> > +  case AVX512:
> > +    Builder.defineMacro("__AVX512__");
> >    case AVX2:
> >      Builder.defineMacro("__AVX2__");
> >    case AVX:
> > @@ -2592,6 +2625,7 @@ void X86TargetInfo::getTargetDefines(con
> >
> >    if (Opts.MicrosoftExt && getTriple().getArch() == llvm::Triple::x86) {
> >      switch (SSELevel) {
> > +    case AVX512:
> >      case AVX2:
> >      case AVX:
> >      case SSE42:
> > @@ -2635,6 +2669,7 @@ bool X86TargetInfo::hasFeature(StringRef
> >        .Case("aes", HasAES)
> >        .Case("avx", SSELevel >= AVX)
> >        .Case("avx2", SSELevel >= AVX2)
> > +      .Case("avx512", SSELevel >= AVX512)
> >        .Case("bmi", HasBMI)
> >        .Case("bmi2", HasBMI2)
> >        .Case("fma", HasFMA)
> >
> > Modified: cfe/trunk/test/Preprocessor/predefined-arch-macros.c
> > URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/predefined-arch-macros.c?rev=188758&r1=188757&r2=188758&view=diff
> >
> ==============================================================================
> > --- cfe/trunk/test/Preprocessor/predefined-arch-macros.c (original)
> > +++ cfe/trunk/test/Preprocessor/predefined-arch-macros.c Tue Aug 20
> 02:09:39 2013
> > @@ -509,6 +509,7 @@
> >  // RUN:     -target i386-unknown-linux \
> >  // RUN:   | FileCheck %s -check-prefix=CHECK_CORE_AVX2_M32
> >  // CHECK_CORE_AVX2_M32: #define __AES__ 1
> > +// CHECK_CORE_AVX2_M32: #define __AVX2__ 1
> >  // CHECK_CORE_AVX2_M32: #define __AVX__ 1
> >  // CHECK_CORE_AVX2_M32: #define __BMI2__ 1
> >  // CHECK_CORE_AVX2_M32: #define __BMI__ 1
> > @@ -536,6 +537,7 @@
> >  // RUN:     -target i386-unknown-linux \
> >  // RUN:   | FileCheck %s -check-prefix=CHECK_CORE_AVX2_M64
> >  // CHECK_CORE_AVX2_M64: #define __AES__ 1
> > +// CHECK_CORE_AVX2_M64: #define __AVX2__ 1
> >  // CHECK_CORE_AVX2_M64: #define __AVX__ 1
> >  // CHECK_CORE_AVX2_M64: #define __BMI2__ 1
> >  // CHECK_CORE_AVX2_M64: #define __BMI__ 1
> > @@ -563,6 +565,68 @@
> >  // CHECK_CORE_AVX2_M64: #define __x86_64 1
> >  // CHECK_CORE_AVX2_M64: #define __x86_64__ 1
> >  //
> > +// RUN: %clang -march=knl -m32 -E -dM %s -o - 2>&1 \
> > +// RUN:     -target i386-unknown-linux \
> > +// RUN:   | FileCheck %s -check-prefix=CHECK_KNL_M32
> > +// CHECK_KNL_M32: #define __AES__ 1
> > +// CHECK_KNL_M32: #define __AVX2__ 1
> > +// CHECK_KNL_M32: #define __AVX512__ 1
> > +// CHECK_KNL_M32: #define __AVX__ 1
> > +// CHECK_KNL_M32: #define __BMI2__ 1
> > +// CHECK_KNL_M32: #define __BMI__ 1
> > +// CHECK_KNL_M32: #define __F16C__ 1
> > +// CHECK_KNL_M32: #define __FMA__ 1
> > +// CHECK_KNL_M32: #define __LZCNT__ 1
> > +// CHECK_KNL_M32: #define __MMX__ 1
> > +// CHECK_KNL_M32: #define __PCLMUL__ 1
> > +// CHECK_KNL_M32: #define __POPCNT__ 1
> > +// CHECK_KNL_M32: #define __RDRND__ 1
> > +// CHECK_KNL_M32: #define __RTM__ 1
> > +// CHECK_KNL_M32: #define __SSE2__ 1
> > +// CHECK_KNL_M32: #define __SSE3__ 1
> > +// CHECK_KNL_M32: #define __SSE4_1__ 1
> > +// CHECK_KNL_M32: #define __SSE4_2__ 1
> > +// CHECK_KNL_M32: #define __SSE__ 1
> > +// CHECK_KNL_M32: #define __SSSE3__ 1
> > +// CHECK_KNL_M32: #define __i386 1
> > +// CHECK_KNL_M32: #define __i386__ 1
> > +// CHECK_KNL_M32: #define __knl 1
> > +// CHECK_KNL_M32: #define __knl__ 1
> > +// CHECK_KNL_M32: #define __tune_knl__ 1
> > +// CHECK_KNL_M32: #define i386 1
> > +// RUN: %clang -march=knl -m64 -E -dM %s -o - 2>&1 \
> > +// RUN:     -target i386-unknown-linux \
> > +// RUN:   | FileCheck %s -check-prefix=CHECK_KNL_M64
> > +// CHECK_KNL_M64: #define __AES__ 1
> > +// CHECK_KNL_M64: #define __AVX2__ 1
> > +// CHECK_KNL_M64: #define __AVX512__ 1
> > +// CHECK_KNL_M64: #define __AVX__ 1
> > +// CHECK_KNL_M64: #define __BMI2__ 1
> > +// CHECK_KNL_M64: #define __BMI__ 1
> > +// CHECK_KNL_M64: #define __F16C__ 1
> > +// CHECK_KNL_M64: #define __FMA__ 1
> > +// CHECK_KNL_M64: #define __LZCNT__ 1
> > +// CHECK_KNL_M64: #define __MMX__ 1
> > +// CHECK_KNL_M64: #define __PCLMUL__ 1
> > +// CHECK_KNL_M64: #define __POPCNT__ 1
> > +// CHECK_KNL_M64: #define __RDRND__ 1
> > +// CHECK_KNL_M64: #define __RTM__ 1
> > +// CHECK_KNL_M64: #define __SSE2_MATH__ 1
> > +// CHECK_KNL_M64: #define __SSE2__ 1
> > +// CHECK_KNL_M64: #define __SSE3__ 1
> > +// CHECK_KNL_M64: #define __SSE4_1__ 1
> > +// CHECK_KNL_M64: #define __SSE4_2__ 1
> > +// CHECK_KNL_M64: #define __SSE_MATH__ 1
> > +// CHECK_KNL_M64: #define __SSE__ 1
> > +// CHECK_KNL_M64: #define __SSSE3__ 1
> > +// CHECK_KNL_M64: #define __amd64 1
> > +// CHECK_KNL_M64: #define __amd64__ 1
> > +// CHECK_KNL_M64: #define __knl 1
> > +// CHECK_KNL_M64: #define __knl__ 1
> > +// CHECK_KNL_M64: #define __tune_knl__ 1
> > +// CHECK_KNL_M64: #define __x86_64 1
> > +// CHECK_KNL_M64: #define __x86_64__ 1
> > +//
> >  // RUN: %clang -march=atom -m32 -E -dM %s -o - 2>&1 \
> >  // RUN:     -target i386-unknown-linux \
> >  // RUN:   | FileCheck %s -check-prefix=CHECK_ATOM_M32
> >
> >
> > _______________________________________________
> > cfe-commits mailing list
> > cfe-commits at cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits
>



-- 
~Craig
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