[cfe-commits] r160308 - in /cfe/trunk: lib/CodeGen/CGBuiltin.cpp lib/CodeGen/CodeGenFunction.h test/CodeGen/builtins-mips-ovld.c

[Benjamin Kramer]

On 16.07.2012, at 20:52, Simon Atanasyan <satanasyan at mips.com> wrote:

> Author: atanasyan
> Date: Mon Jul 16 13:52:02 2012
> New Revision: 160308
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=160308&view=rev
> Log:
> MIPS: Implement __builtin_mips_shll_qb builtin function overloading.
> This function has two versions. The first one is used for a register operand.
> The second one is used for an immediate number.

Would it make sense to do this as an optimization in the backend instead? The IR optimizers can infer constants in a lot more cases, I assume the constant version of the builtin only differs in performance/code size?

- Ben
> 
> Added:
>    cfe/trunk/test/CodeGen/builtins-mips-ovld.c
> Modified:
>    cfe/trunk/lib/CodeGen/CGBuiltin.cpp
>    cfe/trunk/lib/CodeGen/CodeGenFunction.h
> 
> Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=160308&r1=160307&r2=160308&view=diff
> ==============================================================================
> --- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
> +++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Mon Jul 16 13:52:02 2012
> @@ -1378,6 +1378,11 @@
>   case llvm::Triple::ppc:
>   case llvm::Triple::ppc64:
>     return EmitPPCBuiltinExpr(BuiltinID, E);
> +  case llvm::Triple::mips:
> +  case llvm::Triple::mipsel:
> +  case llvm::Triple::mips64:
> +  case llvm::Triple::mips64el:
> +    return EmitMipsBuiltinExpr(BuiltinID, E);
>   default:
>     return 0;
>   }
> @@ -2563,3 +2568,27 @@
>   }
>   }
> }
> +
> +Value *CodeGenFunction::EmitMipsBuiltinExpr(unsigned BuiltinID,
> +                                            const CallExpr *E) {
> +  SmallVector<Value*, 4> Ops;
> +
> +  for (unsigned i = 0, e = E->getNumArgs(); i != e; i++)
> +    Ops.push_back(EmitScalarExpr(E->getArg(i)));
> +
> +  Intrinsic::ID ID = Intrinsic::not_intrinsic;
> +
> +  switch (BuiltinID) {
> +  default: return 0;
> +  case Mips::BI__builtin_mips_shll_qb:
> +    llvm::APSInt Value;
> +    if (E->getArg(1)->isIntegerConstantExpr(Value, getContext()))
> +      ID = Intrinsic::mips_shll_qb;
> +    else
> +      ID = Intrinsic::mips_shll_qb_v;
> +    break;
> +  }
> +
> +  llvm::Function *F = CGM.getIntrinsic(ID);
> +  return Builder.CreateCall(F, Ops, "");
> +}
> 
> Modified: cfe/trunk/lib/CodeGen/CodeGenFunction.h
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CodeGenFunction.h?rev=160308&r1=160307&r2=160308&view=diff
> ==============================================================================
> --- cfe/trunk/lib/CodeGen/CodeGenFunction.h (original)
> +++ cfe/trunk/lib/CodeGen/CodeGenFunction.h Mon Jul 16 13:52:02 2012
> @@ -2276,6 +2276,7 @@
>   llvm::Value *BuildVector(ArrayRef<llvm::Value*> Ops);
>   llvm::Value *EmitX86BuiltinExpr(unsigned BuiltinID, const CallExpr *E);
>   llvm::Value *EmitPPCBuiltinExpr(unsigned BuiltinID, const CallExpr *E);
> +  llvm::Value *EmitMipsBuiltinExpr(unsigned BuiltinID, const CallExpr *E);
> 
>   llvm::Value *EmitObjCProtocolExpr(const ObjCProtocolExpr *E);
>   llvm::Value *EmitObjCStringLiteral(const ObjCStringLiteral *E);
> 
> Added: cfe/trunk/test/CodeGen/builtins-mips-ovld.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-mips-ovld.c?rev=160308&view=auto
> ==============================================================================
> --- cfe/trunk/test/CodeGen/builtins-mips-ovld.c (added)
> +++ cfe/trunk/test/CodeGen/builtins-mips-ovld.c Mon Jul 16 13:52:02 2012
> @@ -0,0 +1,13 @@
> +// REQUIRES: mips-registered-target
> +// RUN: %clang_cc1 -triple mips-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s
> +
> +typedef signed char v4i8 __attribute__ ((vector_size(4)));
> +
> +void foo() {
> +  v4i8 a = {1, 2, 3, 4};
> +  int shift = 1;
> +// CHECK: {{%.*}} = call <4 x i8> @llvm.mips.shll.qb(<4 x i8> {{%.*}}, i32 1)
> +  v4i8 r1 = __builtin_mips_shll_qb(a, 1);
> +// CHECK: {{%.*}} = call <4 x i8> @llvm.mips.shll.qb.v(<4 x i8> {{%.*}}, i32 {{%.*}})
> +  v4i8 r2 = __builtin_mips_shll_qb(a, shift);
> +}
> 
> 
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