[cfe-commits] Mips inline constraint register patch. Request for review and commit.

Carter, Jack jcarter at mips.com
Tue Apr 3 10:44:49 PDT 2012


I hadn't thought of that. I'll bolster the test case and send a patch.

Thanks,

Jack
________________________________________
From: Eric Christopher [echristo at apple.com]
Sent: Monday, April 02, 2012 6:17 PM
To: Carter, Jack
Cc: cfe-commits at cs.uiuc.edu
Subject: Re: [cfe-commits] Mips inline constraint register patch. Request for review and commit.

Committed here:

        A       test/CodeGen/mips-constraint-regs.c
        M       lib/Basic/Targets.cpp
r153921 = 095abd1524be925f922802a99cdfee3e1b59e79c (refs/remotes/origin/master)

Some IR level checking to make sure what you expect is being emitted would be good as well not just whether or not it is being accepted.

-eric

On Mar 30, 2012, at 7:13 PM, "Carter, Jack" <jcarter at mips.com> wrote:

> This time with the patch :-(
> From: Carter, Jack
> Sent: Friday, March 30, 2012 7:05 PM
> To: cfe-commits at cs.uiuc.edu
> Cc: bruno.cardoso at gmail.com
> Subject: Mips inline constraint register patch. Request for review and commit.
>
> Mips_reg_constraint.patch
>
> Contributor: Jack Carter
>
> Inline asm directives have constraint characters that describe what is legal
> for the particular operand. Some of these constraints state that the operand
> is a register, specific or general.
>
> This patch adds 3 different characters to the list of characters that represents
> registers:
>
>     'c': A register suitable for use in an indirect jump.
>     'l': The lo register.
>     'x': The concatenated hi and lo registers.
>
> This patch does not address the semantic behavior.
> <Mips_reg_constraint.patch>_______________________________________________
> cfe-commits mailing list
> cfe-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits





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