[all-commits] [llvm/llvm-project] 8d8cb1: [AArch64] Avoid pairing loads when the base reg is...

[Danilo Carvalho Grael via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 8d8cb1ad80b7074ac60d070fae89261894d34a0d
      https://github.com/llvm/llvm-project/commit/8d8cb1ad80b7074ac60d070fae89261894d34a0d
  Author: Congzhe Cao <congzhe.cao@@huawei.com>
  Date:   2020-09-30 (Wed, 30 Sep 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
    A llvm/test/CodeGen/AArch64/aarch64-ldst-modified-baseReg.mir

  Log Message:
  -----------
  [AArch64] Avoid pairing loads when the base reg is modified

When pairing loads, we should check if in between the two loads the
base register has been modified. If that is the case then avoid pairing
them because the second load actually loads from a different address.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D86956