[all-commits] [llvm/llvm-project] 2c3bc9: [PowerPC] Implement Vector Count Mask Bits builtin...

[Amy Kwan via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 2c3bc918db35913437e9302b77b11c08eb3ea6e4
      https://github.com/llvm/llvm-project/commit/2c3bc918db35913437e9302b77b11c08eb3ea6e4
  Author: Amy Kwan <amy.kwan1 at ibm.com>
  Date:   2020-09-17 (Thu, 17 Sep 2020)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsPPC.def
    M clang/lib/Headers/altivec.h
    M clang/test/CodeGen/builtins-ppc-p10vector.c
    M llvm/include/llvm/IR/IntrinsicsPowerPC.td
    M llvm/lib/Target/PowerPC/PPCInstrPrefix.td
    M llvm/test/CodeGen/PowerPC/p10-vector-mask-ops.ll

  Log Message:
  -----------
  [PowerPC] Implement Vector Count Mask Bits builtins in LLVM/Clang

This patch implements the vec_cntm function prototypes in altivec.h in order to
utilize the vector count mask bits instructions introduced in Power10.

Differential Revision: https://reviews.llvm.org/D82726


  Commit: 6f3c0991bf9be48bd18a324c90e4cfcd37f82b96
      https://github.com/llvm/llvm-project/commit/6f3c0991bf9be48bd18a324c90e4cfcd37f82b96
  Author: Amy Kwan <amy.kwan1 at ibm.com>
  Date:   2020-09-17 (Thu, 17 Sep 2020)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCInstrPrefix.td
    M llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31.txt
    M llvm/test/MC/PowerPC/ppc64-encoding-ISA31.s

  Log Message:
  -----------
  [PowerPC] Add Set Boolean Condition Instruction Definitions and MC Tests

This patch adds the instruction definitions and assembly/disassembly tests for
the set boolean condition instructions. This also includes the negative, and
reverse variants of the instruction.

Differential Revision: https://reviews.llvm.org/D86252


Compare: https://github.com/llvm/llvm-project/compare/b4013f9c7feb...6f3c0991bf9b