[all-commits] [llvm/llvm-project] 0b7f6c: GlobalISel: Add generic instructions for memory in...

Matt Arsenault via All-commits all-commits at lists.llvm.org
Wed Aug 26 17:09:02 PDT 2020


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 0b7f6cc71a72a85f8a0cbee836a7a8e31876951a
      https://github.com/llvm/llvm-project/commit/0b7f6cc71a72a85f8a0cbee836a7a8e31876951a
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-08-26 (Wed, 26 Aug 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
    M llvm/include/llvm/Support/TargetOpcodes.def
    M llvm/include/llvm/Target/GenericOpcodes.td
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/CodeGen/MachineVerifier.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
    M llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
    M llvm/lib/Target/X86/X86LegalizerInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/inline-small-memcpy.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-with-debug-info.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memlib-debug-loc.mir
    M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
    M llvm/test/CodeGen/Mips/GlobalISel/legalizer/dyn_stackalloc.mir
    M llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
    A llvm/test/MachineVerifier/test_g_memcpy.mir
    A llvm/test/MachineVerifier/test_g_memset.mir
    R llvm/test/MachineVerifier/test_memccpy_intrinsics.mir

  Log Message:
  -----------
  GlobalISel: Add generic instructions for memory intrinsics

AArch64, X86 and Mips currently directly consumes these and custom
lowering to produce a libcall, but really these should follow the
normal legalization process through the libcall/lower action.




More information about the All-commits mailing list