[all-commits] [llvm/llvm-project] b690c1: [AMDGPU] Correct DWARF register defintions

[Tony Tye via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: b690c1157e90b67ecd8f03b902c452ad13defb6f
      https://github.com/llvm/llvm-project/commit/b690c1157e90b67ecd8f03b902c452ad13defb6f
  Author: Tony <Tony.Tye at amd.com>
  Date:   2020-08-20 (Thu, 20 Aug 2020)

  Changed paths:
    M llvm/docs/AMDGPUUsage.rst

  Log Message:
  -----------
  [AMDGPU] Correct DWARF register defintions

- Rename AMDGPU SCC DWARF register to STATUS since the scalar
  condition code is a bit within the STATUS register.

- Correct bit size of the VCC_64 register to 64 which is the size in
  wave64 mode.

Differential Revision: https://reviews.llvm.org/D86259